Full-parallel digital implementation for pre-trained NNs

Proceedings of the International Joint Conference on Neural Networks

Volumn 2, Issue , 2000, Pages 49-54

  Szabo, Tamas ^a   Antoni, Lorinc ^a   Horvath, Gabor ^a   Feher, Bela ^a  

^a BUDAPEST UNIVERSITY OF TECHNOLOGY AND ECONOMICS   (Hungary)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; DIGITAL SIGNAL PROCESSING; ENCODING (SYMBOLS); LEARNING ALGORITHMS; LEARNING SYSTEMS; MATRIX ALGEBRA; MULTIPLYING CIRCUITS; OPTIMIZATION; VECTORS;

CANONIC SIGNED DIGIT (CSD) ENCODING; MATRIX-VECTOR MULTIPLIERS; PARALLEL NEURAL NETWORKS;

NEURAL NETWORKS;

EID: 0033703460     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)