A maskable memory architecture for rank-order filtering

IEEE Transactions on Consumer Electronics

Volumn 50, Issue 2, 2004, Pages 558-564

  Dung, Lan Rong ^a   Lin, Meng Chun ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; IMAGE PROCESSING; MASKS; PARALLEL ALGORITHMS; PARALLEL PROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; VLSI CIRCUITS;

MASKABLE MEMORY; MEDIAN FILTER; RANK ORDER FILTER;

SIGNAL FILTERING AND PREDICTION;

EID: 4043145104     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCE.2004.1309423     Document Type: Article

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