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Volumn 25, Issue 8, 2004, Pages 541-543

Improvement of FinFET electrical characteristics by hydrogen annealing

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; ELECTRIC PROPERTIES; LEAKAGE CURRENTS; LITHOGRAPHY; MOS DEVICES; REACTIVE ION ETCHING; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; SURFACE ROUGHNESS; THRESHOLD VOLTAGE; TRANSMISSION ELECTRON MICROSCOPY;

EID: 3943054085     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2004.832787     Document Type: Article
Times cited : (88)

References (12)
  • 2
    • 0041886632 scopus 로고    scopus 로고
    • Ideal rectangular cross section Si-Fin channel double-gate MOSFETs fabricated using orientation-dependent wet etching
    • Apr
    • Y. Liu, K. Ishii, T. Tsutsumi, M. Masahara, and E. Suzuki, "Ideal rectangular cross section Si-Fin channel double-gate MOSFETs fabricated using orientation-dependent wet etching," IEEE Electron Device Lett., vol. 24, pp. 484-486, Apr. 2003.
    • (2003) IEEE Electron Device Lett. , vol.24 , pp. 484-486
    • Liu, Y.1    Ishii, K.2    Tsutsumi, T.3    Masahara, M.4    Suzuki, E.5
  • 7
    • 3943072883 scopus 로고    scopus 로고
    • High-performance 45-nm CMOS technology with 20-nm multi-gate devices
    • Z. Krivokapic, C. Tabery, W. Maszara, Q. Xiang, and M. R. Lin, "High-performance 45-nm CMOS technology with 20-nm multi-gate devices," in Proc. SSDM, 2003, pp. 760-762.
    • (2003) Proc. SSDM , pp. 760-762
    • Krivokapic, Z.1    Tabery, C.2    Maszara, W.3    Xiang, Q.4    Lin, M.R.5
  • 9
  • 11
    • 0042029738 scopus 로고    scopus 로고
    • Shape transformation of silicon trenches during hydrogen annealing
    • H. Kuribayashi, R. Hiruta, R. Shimizu, K. Sudoh, and H. Iwasaki, "Shape transformation of silicon trenches during hydrogen annealing," J. Vac. Sci. Technol., vol. A21, no. 4, pp. 1279-1283, 2003.
    • (2003) J. Vac. Sci. Technol. , vol.A21 , Issue.4 , pp. 1279-1283
    • Kuribayashi, H.1    Hiruta, R.2    Shimizu, R.3    Sudoh, K.4    Iwasaki, H.5
  • 12
    • 0142248010 scopus 로고    scopus 로고
    • Impact of nonvertical sidewall on sub-50-nm FinFET
    • X. Wu, P. C. H. Chan, and M. Chan, "Impact of nonvertical sidewall on sub-50-nm FinFET," in Proc. Int. SOI Conf., 2003, pp. 151-152.
    • (2003) Proc. Int. SOI Conf. , pp. 151-152
    • Wu, X.1    Chan, P.C.H.2    Chan, M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.