-
2
-
-
38849143865
-
-
D. Burger and T. Austin. The Simplescalar Toolset, Version 2.0. Technical Report TR-97-1342, University of Wisconsin-Madison, June 1997
-
D. Burger and T. Austin. The Simplescalar Toolset, Version 2.0. Technical Report TR-97-1342, University of Wisconsin-Madison, June 1997.
-
-
-
-
3
-
-
84944408934
-
Processor acceleration through automated instruction set customisation
-
N. Clark, H. Zhong, and S. Mahlke. Processor acceleration through automated instruction set customisation. In Proceedings of MICRO, 2003.
-
(2003)
Proceedings of MICRO
-
-
Clark, N.1
Zhong, H.2
Mahlke, S.3
-
5
-
-
10444232320
-
Merrimac: Supercomputing with Streams
-
W. Dally and P. Hanrahan. Merrimac: Supercomputing with Streams. In Supercomputing, 2003.
-
(2003)
Supercomputing
-
-
Dally, W.1
Hanrahan, P.2
-
7
-
-
0030243819
-
Energy dissipation in general purpose microprocessors
-
Sept
-
R. Gonzalez and M. Horowitz. Energy dissipation in general purpose microprocessors. IEEE Journal of Solid-State Circuits, 31(9):1277-1284, Sept. 1996.
-
(1996)
IEEE Journal of Solid-State Circuits
, vol.31
, Issue.9
, pp. 1277-1284
-
-
Gonzalez, R.1
Horowitz, M.2
-
8
-
-
0033884908
-
Xtensa - A configurable and extensible processor
-
2000
-
R. E. Gonzalez. Xtensa - A configurable and extensible processor. IEEE Micro, 20(2):60-70, /2000.
-
IEEE Micro
, vol.20
, Issue.2
, pp. 60-70
-
-
Gonzalez, R.E.1
-
11
-
-
2942747557
-
Up based instruction scheduling for ia-64
-
D. Kastner and S. Winkel. Up based instruction scheduling for ia-64. In ACM SIGPLAN LCTES workshop, pages 145-154, 2001.
-
(2001)
ACM SIGPLAN LCTES workshop
, pp. 145-154
-
-
Kastner, D.1
Winkel, S.2
-
12
-
-
0031599788
-
Space-time scheduling of instruction-level parallelism on a raw machine
-
W. Lee, R. Barua, M. Frank, D. Srikrishna, J. Babb, V. Sarkar, and S. P. Amarasinghe. Space-time scheduling of instruction-level parallelism on a raw machine. In Architectural Support for Programming Languages and Operating Systems, pages 46-57, 1998.
-
(1998)
Architectural Support for Programming Languages and Operating Systems
, pp. 46-57
-
-
Lee, W.1
Barua, R.2
Frank, M.3
Srikrishna, D.4
Babb, J.5
Sarkar, V.6
Amarasinghe, S.P.7
-
13
-
-
0034497287
-
Instruction scheduling for clustered VLIW DSPs
-
R. Leupers. Instruction scheduling for clustered VLIW DSPs. In IEEE PACT, pages 291-300, 2000.
-
(2000)
IEEE PACT
, pp. 291-300
-
-
Leupers, R.1
-
16
-
-
34547197349
-
Modulo Graph Embedding: Mapping Applications onto Coarse-Grained Reconfigurable Architectures
-
October
-
H. Park, K. Fan, M. Kudlur, and S. Mahlke. Modulo Graph Embedding: Mapping Applications onto Coarse-Grained Reconfigurable Architectures. In CASES, October 2006.
-
(2006)
CASES
-
-
Park, H.1
Fan, K.2
Kudlur, M.3
Mahlke, S.4
-
17
-
-
0034290919
-
The feret evaluation methodology for face-recognition algorithms
-
October
-
P. Phillips, H. Moon, S. Rizvi, and P. Rauss. The feret evaluation methodology for face-recognition algorithms. In T-PAMI, volume 22, pages 1090-1104, October 2000.
-
(2000)
T-PAMI
, vol.22
, pp. 1090-1104
-
-
Phillips, P.1
Moon, H.2
Rizvi, S.3
Rauss, P.4
-
20
-
-
0032312385
-
A bandwidth-efficient architecture for media processing
-
S. Rixner, W. J. Dally, U. J. Kapasi, B. Khailany, A. Lopez-Lagunas, P. R. Mattson, and J. D. Owens. A bandwidth-efficient architecture for media processing. In International Symposium on Microarchitecture, pages 3-13, 1998.
-
(1998)
International Symposium on Microarchitecture
, pp. 3-13
-
-
Rixner, S.1
Dally, W.J.2
Kapasi, U.J.3
Khailany, B.4
Lopez-Lagunas, A.5
Mattson, P.R.6
Owens, J.D.7
-
21
-
-
0031672526
-
Neural network-based face detection
-
H. A. Rowley, S. Baluja, and T. Kanade. Neural network-based face detection. IEEE Transactions on Pattern Analysis and Machine Intelligence, 20(1):23-38, 1998.
-
(1998)
IEEE Transactions on Pattern Analysis and Machine Intelligence
, vol.20
, Issue.1
, pp. 23-38
-
-
Rowley, H.A.1
Baluja, S.2
Kanade, T.3
-
22
-
-
38849135899
-
-
R. E. Schapire. The boosting approach to machine learning: An overview. In In MSRI Workshop on Nonlinear Estimation and Classification, 2002.
-
R. E. Schapire. The boosting approach to machine learning: An overview. In In MSRI Workshop on Nonlinear Estimation and Classification, 2002.
-
-
-
-
23
-
-
0033892359
-
EPIC: Explicitly parallel instruction computing
-
M. S. Schlansker and B. R. R. Cover. EPIC: Explicitly parallel instruction computing. Computer, 33(2):37-45, 2000.
-
(2000)
Computer
, vol.33
, Issue.2
, pp. 37-45
-
-
Schlansker, M.S.1
Cover, B.R.R.2
-
26
-
-
0031236158
-
Baring it all to software: Raw machines
-
E. Waingold, M. Taylor, D. Srikrishna, V. Sarkar, W. Lee, V. Lee, J. Kim, M. Frank, P. Finch, R. Barua, J. Babb, S. Amarasinghe, and A. Agarwal. Baring it all to software: Raw machines. IEEE Computer, 30(9):86-93, 1997.
-
(1997)
IEEE Computer
, vol.30
, Issue.9
, pp. 86-93
-
-
Waingold, E.1
Taylor, M.2
Srikrishna, D.3
Sarkar, V.4
Lee, W.5
Lee, V.6
Kim, J.7
Frank, M.8
Finch, P.9
Barua, R.10
Babb, J.11
Amarasinghe, S.12
Agarwal, A.13
-
27
-
-
0003642105
-
Face Recognition by Elastic Bunch Graph Matching
-
Technical Report 96-08, Ruhr-Universitat Bochum, April
-
L. Wiskott, J. Fellous, N. Kruger, and C. Malsburg. Face Recognition by Elastic Bunch Graph Matching. Technical Report 96-08, Ruhr-Universitat Bochum, April 1996.
-
(1996)
-
-
Wiskott, L.1
Fellous, J.2
Kruger, N.3
Malsburg, C.4
|