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Volumn , Issue , 2000, Pages 291-300
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Instruction scheduling for clustered VLIW DSPs
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
PARALLEL PROCESSING SYSTEMS;
PIPELINE PROCESSING SYSTEMS;
PROGRAM COMPILERS;
RESOURCE ALLOCATION;
VERY LONG INSTRUCTION WORD ARCHITECTURE;
INSTRUCTION SCHEDULING;
PARTITIONING;
DIGITAL SIGNAL PROCESSING;
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EID: 0034497287
PISSN: 1089795X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
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Times cited : (66)
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References (24)
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