Transition reduction in memory buses using sector-based encoding techniques

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 23, Issue 8, 2004, Pages 1164-1174

  Aghaghiri, Yazdan ^a   Fallah, Farzan ^b   Pedram, Massoud ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

^b FUJITSU LABORATORIES LTD   (Japan)

Author keywords

Bus encoding; CMOS; Low power design; Switching activity; Very large scale integration (VLSI)

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SYSTEMS; DATA REDUCTION; DIGITAL SIGNAL PROCESSING; INPUT OUTPUT PROGRAMS; MULTIPLEXING; SWITCHING; VLSI CIRCUITS;

BUS-ENCODING; LOW-POWER DESIGN; MEMORY BUSES; SWITCHING ACTIVITIES;

DATA STORAGE EQUIPMENT;

EID: 3843117680     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.831589     Document Type: Article

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