Interconnect coupling-aware driver modeling in static noise analysis for nanometer circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 23, Issue 8, 2004, Pages 1256-1263

  Bai, Xiaoliang ^a,b   Chandra, Rajit ^b,c   Dey, Sujit ^a   Srinivas, Prasanna V ^b,d  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b MAGMA DESIGN AUTOMATION   (United States)

^c Gradient Design Automation Inc   (United States)

^d Sierra Design Automation   (United States)

Author keywords

Driver; Interconnect; Noise analysis; Signal integrity

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; COMPUTER SOFTWARE; CROSSTALK; INTERCONNECTION NETWORKS; NANOTECHNOLOGY;

CROSSTALK NOISE; NOISE ANALYSIS; SIGNAL INTEGRITY; VOLTAGE FLUCTUATIONS;

INTEGRATED CIRCUITS;

EID: 3843054618     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.831568     Document Type: Article

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