A 2.4-GHz fully integrated ESD-protected low-noise amplifier in 130-nm PD SOI CMOS technology

IEEE Transactions on Microwave Theory and Techniques

Volumn 55, Issue 12, 2007, Pages 2822-2831

  El Kaamouchi, Majid ^a,b   Si Moussa, Mehdi ^a,b   Delatte, Pierre ^c   Wybo, Geert ^d   Bens, A ^d   Raskin, Jean Pierre ^a,b   Vanhoenacker Janvier, Danielle ^a,b  

^a IEEE   (Belgium)

^b UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

^c CISSOID SA   (Belgium)

^d BVBA BTW BE 0472687037 RPR   (Belgium)

Author keywords

CMOS; Electrostatic discharges (ESDs); Low noise amplifier (LNA); Narrowband; Partially depleted (PD) silicon on insulator (SOI); RF; Transmission line pulse (TLP)

Indexed keywords

TRANSMISSION LINE PULSES (TLP);

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC LINES; ELECTROSTATIC DISCHARGE; MATHEMATICAL MODELS; SILICON ON INSULATOR TECHNOLOGY;

LOW NOISE AMPLIFIERS;

EID: 36949021539     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/TMTT.2007.909148     Document Type: Conference Paper

References (18)

1. J. P. Colinge, Silicon-on-Insulator Technology: Materials to VLSI, 2nd ed. Norwell, MA: Kluwer, 1997.
2. max 90-nm SOI CMOS SoC technology with low-power millimeter-wave digital and RF circuit capability," in VLSI Technol. Tech. Symp. Dig., Jun. 15-17, 2004, pp. 98-99.
3. S. H. Voldman, ESD: Circuits and Devices. New York: Wiley, 2005.
4. S. H. Voldman, "The state of the art of electrostatic discharge protection: Physics, technology, circuits, design, simulation, and scaling," IEEE J. Solid-State Circuits, vol. 34, no. 9, pp. 1272-1282, Sep. 1999.
5. M. Dehan, "Characterization and modeling of SOI RF integrated components," Ph.D. dissertation, Dept. Appl. Phys., Univ. catholique de Louvain, Louvain, Belgium, 2003.
6. D. K. Shaeffer and T. H. Lee, "A 1.5-V, 1.5-GHz CMOS low noise amplifier," IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 745-759, May 1997.
7. T.-K. Nguyen, C.-H. Kim, G.-J. Ihm, M.-S. Yang, and S.-G. Lee, "CMOS low-noise amplifier design optimization techniques," IEEE Trans. Microw. Theory Tech., vol. 52, no. 5, pp. 1433-1442, May 2004.
8. M. El Kaamouchi, M. Si Moussa, J.-P. Raskin, and D. Vanhoenacker-Janvier, "A 2-mW power consumption low noise amplifier in PD SOI CMOS technology for 2.4 GHz applications," in Proc. SiRF, Jan. 10-12, 2007, pp. 253-256.
9. M. El Kaamouchi, M. Si Moussa, P. Delatte, G. Wybo, A. Bens, J.-P. Raskin, and D. Vanhoenacker-Janvier, "A 2.4-GHz fully integrated ESD-protected low-noise amplifier in 130-nm. PD SOI CMOS technology," in IEEE MTT-S Int. Microw. Symp. Dig., 2007, pp. 2091-2094.
10. Electrostatic Discharge Sensitivity Testing-Human Body Model (HBM) Component Level, ANSI/ESD Standard STM5.1-2001, 2001.
11. T. Maloney and N. Khurana, "Transmission line pulsing techniques for circuit modeling of ESD phenomena," in Proc. EOS/ESD Symp., Minneapolis, MN, 1985, vol. 7, pp. 49-54.
12. H. Gieser and M. Haunschild, "Very-fast transmission line pulsing of integrated structures and the charge device model," IEEE Trans. Compon., Packag. Manuf. Technnol. C, vol. 21, no. 4, pp. 278-285, Apr. 1998.
13. J. E. Barth, K. Verhaege, L. G. Henry, and J. Richner, "TLP calibration, correlation, standards, and new techniques," IEEE Trans. Electron. Packag. Manuf., vol. 24, no. 2, pp. 99-108, Apr. 2001.
14. D. Linten, S. Thijs, M. Iyer Natarajan, P. Wambacq, W. Jeamsaksiri, J. Ramos, A. Mercha, S. Jenei, S. Donnay, and S. Decoutere, "A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS," IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1434-1442, Jul. 2005.
15. V. Chandrasekhar, C. M. Hung, Y. C. Ho, and K. Mayaram, "A packaged 2.4 GHz LNA in a 0.15 μm CMOS process with 2 kV HBM ESD protection," in IEEE Int. Solid-State Circuits Tech. Dig., Sep. 2002, pp. 347-350.
16. T. Liu and E. Westerwick, "5-GHz CMOS radio transceiver front-end chipset," IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1927-1933, Dec. 2000.
17. S. Asgaran, M. J. Deen, and C.-H. Chen, "A 4-mW monolithic CMOS LNA at 5.7 GHz with the gate resistance used for input matching," IEEE Microw. Wireless Compon. Lett., vol. 16, no. 4, pp. 188-190, Apr. 2006.
18. C.-P. Chang, J.-A. Hou, J. Su, C.-W. Chen, T.-S. Liou, S.-C. Wong, and Y.-H. Wang, "A high gain and low supply voltage LNA for the direct conversion application with 4-kV HBM ESD protection in 90-nm RF CMOS," IEEE Microw. Wireless Compon. Lett., vol. 16, no. 11, pp. 188-190, Nov. 2006.