Efficient application representation for HASTE: Hybrid Architectures with a Single, Transformable Executable

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2003-January, Issue , 2003, Pages 101-110

  Levine, B A ^a   Schmit, H H ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Application software; Computer architecture; Embedded system; Fabrics; Hardware; Instruction sets; Kernel; Reconfigurable logic; Signal processing; Streaming media

Indexed keywords

APPLICATION PROGRAMS; COMPUTATION THEORY; COMPUTER HARDWARE; COMPUTERS; EMBEDDED SYSTEMS; FABRICS; HARDWARE; MEDIA STREAMING; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE; SIGNAL PROCESSING;

HETEROGENEOUS INTERFACES; INSTRUCTION SET; INSTRUCTION SET ARCHITECTURE; KERNEL; OVERALL CHARACTERISTICS; RECONFIGURABLE FABRICS; RECONFIGURABLE LOGIC; STREAMING MEDIA;

COMPUTER ARCHITECTURE;

EID: 36949017390     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2003.1227246     Document Type: Conference Paper

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