MATRIX: A reconfigurable computing architecture with configurable instruction distribution and deployable resources

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1996, Pages 157-166

  Mirsky, Ethan ^a   DeHon, Andre ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE CONTROL SYSTEMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CELLULAR ARRAYS; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL METHODS; COMPUTER ARCHITECTURE; MULTIPROCESSING SYSTEMS; STORAGE ALLOCATION (COMPUTER);

MATRIX ARCHITECTURE; UNIFIED CONFIGURABLE NETWORK;

REDUCED INSTRUCTION SET COMPUTING;

EID: 0030394522     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/fpga.1996.564808     Document Type: Conference Paper

References (15)