A comparison of two approaches to parallel simulation of multiprocessors

ISPASS 2007: IEEE International Symposium on Performance Analysis of Systems and Software

Volumn , Issue , 2007, Pages 12-22

  Over, Andrew ^a   Clarke, Bill ^a   Strazdins, Peter ^a  

^a AUSTRALIAN NATIONAL UNIVERSITY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

DISCRETE EVENT SIMULATION; INTERCONNECTION NETWORKS; MODEL CHECKING; QUANTUM COMPUTERS; SOFTWARE DESIGN;

MULTIPROCESSOR SIMULATION; PARALLEL DISCRETE EVENT SIMULATION (PDES) TECHNIQUES; PARALLEL SIMULATION; SIMULATED PROCESSORS;

PARALLEL PROCESSING SYSTEMS;

EID: 36949012714     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPASS.2007.363732     Document Type: Conference Paper

References (22)

1. S. Chaudhry, P. Caprioli, S. Yip, and M. Tremblay, "High-performance throughput Computing," IEEE Micro, vol. 25, no. 3, pp. 32-34, May 2005.
2. S. R. Goldschinidt and J. L. Hennessy, "The accuracy of trace-driven simulations of multiprocessors," in Proceedings of the 1993 ACM SIGMETRICS Conference on Measurement and Modeling of Computer Systems. ACM Press, 1993, pp. 146-157.
3. M. Durbhakula, V. S. Pai, and S. Adve, "Improving the accuracy vs. speed tradeoff for simulating shared-memory multiprocessors with ILP processors," in Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, January 1999, pp. 23-32.
4. E. Witchel and M. Rosenblum, "Embra: Fast and flexible machine simulation," in Proceedings of the 1996 SIGMETRICS conference on Measurement and Modeling of Computer Systems, 1996, pp. 68-79.
5. M. Rosenblum, E. Bugnion, S. Devine, and S. A. Herrad, "Using the SimOS machine simulator to study complex computer systems," ACM Transactions on Modeling and Computer Simulation, vol. 7, no. 1, pp. 78-103, Jan 1997.
6. S. K. Reinhardt, M. D. Hill, J. R. Larus, A. R. Lebeck, J. C. Lewis, and D. A. Wood, "The Wisconsin Wind Tunnel: Virtual prototyping of parallel computers," in Proceedings of the 1993 ACM SIGMETRICS Conference on Measurement and. Modeling of Computer Systems. ACM Press, 1993, pp. 48-60.
7. S. S. Mukherjee, S. K. Reinhardt, B. Falsafi, M. Litzkow, M. D. Hill, D. A. Wood, S. Huss-Lederman, and J. R. Larus, "Wisconsin Wind Tunnel II: A fast, portable parallel architecture simulator," IEEE Concurrency, vol. 8, no. 4, pp. 12-20, October 2000.
8. M. Chidester and A. George, "Parallel simulation of chip-multiprocessor architectures," ACM Transactions on Modeling and Computer Simulation, vol. 12, no. 3, pp. 176-200, July 2002.
9. D. Burger and T. Austin, "The SimpleScalar Tool Set, Version 2.0," Computer Sciences Department, University of Wisconsin-Madison, Tech. Rep. TR-1342, 1997.
10. N. Manjikian, "Parallel simulation of multiprocessor execution: Implementation and results of SimpleScalar," in Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, Nov 200.1, pp. 147-151.
11. J. Donald and M. Martonosi, "An efficient, practical, parallelization methodology for multicore architecture simulation," IEEE Computer Architecture Letters, vol. 5, no. 2, p. 14, 2006.
12. B. Clarke, A. Czezowski, and P. Strazdins, "Implementation aspects of a SPARC V9 complete machine simulator," in CRPITS '02: Proceedings of the Twenty-Fifth Australasian Conference on Computer Science, vol. 4, 2002, pp. 23-32.
13. P. Strazdins, B. Clarke, and A. Over, "Efficient Cycle-Accurate Simulation of the UltraSPARC III CPU," in CRPITS '07: Proceedings of the Thirtieth Australasian Conference on Computer Science, Jan. 2007, to appear.
14. UltraSPARC III Cu User's Manual. Santa Clara, California, USA: Sun Microsystems, January 2004, version 2.21.
15. A. Charlesworth, "The Sun Fireplane System Interconnect," in Proceedings of the 2001 ACM/IEEE conference on Supercomputing (CDROM). ACM Press, New York, New York, USA, November 2001.
16. A. Over, P. Strazdins, and B. Clarke, "Cycle accurate memory modelling: A. case-study in validation," in MASCOTS '05: Proceedings of the 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems. Washington, DC, USA: IEEE Computer Society, 2005, pp. 85-96.
17. M. Thorn, "Using threading techniques to speed up SMP computer simulation," BSEng Thesis, Department of Computer Science, Australian National University, December 2004.
18. R. M. Fujimoto, "Parallel discrete event simulation," Communications of the ACM, vol. 33, no. 10, pp. 30-53, October 1990.
19. D. C. Burger and D. A. Wood, "Accuracy vs. performance in parallel simulation, of interconnection, networks," in Proceedings of the 9th International Parallel Processing Symposium, 1995, pp. 22-31.
20. H. Jin, M. Frumkin, and J. Yan, "The OpenMP implementation of NAS parallel benchmarks and its performance," NASA Advanced Supercomputing System Division, Tech. Rep. NAS-99-011, October 1999.
21. NASA Advanced Supercomputing, "NAS Parallel Benchmarks," January 2005, version 3.1. [Online]. Available: http://www.nas.nasa.gov/ Software/NPB/
22. B. Falsafi and D. A. Wood, "Modeling cost/performance of a parallel computer simulator," ACM Transactions on Modeling and Computer Simulation, vol. 7, no. 1, pp. 104-130, 1997.