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Volumn , Issue , 2001, Pages 147-151

Parallel simulation of multiprocessor execution: Implementation and results for SimpleScalar

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; MULTIPROCESSING SYSTEMS; PARALLEL PROCESSING SYSTEMS; SIMULATORS;

EID: 34047091921     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPASS.2001.990691     Document Type: Conference Paper
Times cited : (3)

References (12)
  • 1
    • 0003465202 scopus 로고    scopus 로고
    • version 2.0. Tech. Report Computer Sciences Department, University of Wisconsin-Madison, June
    • D. Burger and T. M. Austin. The SimpleScalar tool set, version 2.0. Tech. Report 1342, Computer Sciences Department, University of Wisconsin-Madison, June 1997.
    • (1997) The SimpleScalar Tool Set
    • Burger, D.1    Austin, T.M.2
  • 3
    • 0003792125 scopus 로고    scopus 로고
    • Multiprocessor enhancements of the SimpleScalar tool set
    • March Software
    • N. Manjikian. Multiprocessor enhancements of the SimpleScalar tool set. ACM SIGARCH Computer Architecture News, 29(1):8-15, March 2001. Software available at www.simplescalar.org.
    • (2001) ACM SIGARCH Computer Architecture News , vol.29 , Issue.1 , pp. 8-15
    • Manjikian, N.1
  • 10
    • 0025401087 scopus 로고
    • Instruction issue logic for high-performance, interruptible, multiple functional unit, pipelined computers
    • March
    • G. S. Sohi. Instruction issue logic for high-performance, interruptible, multiple functional unit, pipelined computers. IEEE Transcations on Computers, 39(3):349-359, March 1990.
    • (1990) IEEE Transcations on Computers , vol.39 , Issue.3 , pp. 349-359
    • Sohi, G.S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.