A 95 mW MPEG2 MP@HL motion estimation processor core for portable high-resolution video application

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E88-A, Issue 12, 2005, Pages 3492-3499

  Murachi, Yuichiro ^a   Hamano, Koji ^a   Matsuno, Tetsuro ^a   Miyakoshi, Junichi ^b   Miyama, Masayuki ^a,c,d   Yoshimoto, Masahiko ^b,e  

^a KANAZAWA UNIVERSITY   (Japan)

^b KOBE UNIVERSITY   (Japan)

^c PFU Ltd   (Japan)

^d Innotech Co

^e MITSUBISHI ELECTRIC CORPORATION   (Japan)

Author keywords

HDTV; IP; Low power; Motion estimation; MPEG2

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; MOTION ESTIMATION; OPTICAL RESOLVING POWER; TRANSISTORS;

IP; LOW POWER; MPEG2; RESOLUTION VIDEO;

HIGH DEFINITION TELEVISION;

EID: 29144495743     PISSN: 09168508     EISSN: 17451337     Source Type: Journal    
DOI: 10.1093/ietfec/e88-a.12.3492     Document Type: Article

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