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Volumn , Issue , 2007, Pages 307-316

Inherent Time Redundancy (ITR): Using program repetition for low-overhead fault tolerance

Author keywords

[No Author keywords available]

Indexed keywords

INHERENT TIME REDUNDANCY (ITR); MICROARCHITECTURAL EVENTS; TRANSIENT FAULTS;

EID: 36048959599     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2007.59     Document Type: Conference Paper
Times cited : (8)

References (17)
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    • Teodorescu, R.1    Nakano, J.2    Torrellas, J.3
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    • Fast checkpoint/recovery to support kilo-instruction speculation and hardware fault tolerance
    • Tech. Report: CS-TR-2000-1420, Univ. of Wisconsin, Madison. Oct
    • D. Sorin, M. M. K. Martin and M. D. Hill. Fast checkpoint/recovery to support kilo-instruction speculation and hardware fault tolerance. Tech. Report: CS-TR-2000-1420, Univ. of Wisconsin, Madison. Oct 2000.
    • (2000)
    • Sorin, D.1    Martin, M.M.K.2    Hill, M.D.3
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    • T. M. Austin. Diva: A reliable substrate for deep submicron microarchitecture design. MICRO 1999.
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    • J. Ray, J. C. Hoe and B. Falsafi. Dual use of superscalar datapath for transient-fault detection and recovery. MICRO 2001.
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    • J. C. Smolens, J. Kim, J. C. Hoe and B. Falsafi. Efficient resource sharing in concurrent error detecting superscalar microarchitectures. MICRO 2004.
    • J. C. Smolens, J. Kim, J. C. Hoe and B. Falsafi. Efficient resource sharing in concurrent error detecting superscalar microarchitectures. MICRO 2004.
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    • D. Burger, T. Austin and S. Bennett. The simplescalar toolset, version 2. Tech Report CS-TR-1997-1342, Univ. of Wisconsin, Madison. July 1997
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.