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Volumn , Issue , 2007, Pages 213-224

Fuce: The continuation-based multithreading processor

Author keywords

Chip multi processor; Continuation based multithread programming; Multithreading; Thread level parallelism

Indexed keywords

COMPUTER HARDWARE; COMPUTER SIMULATION; COST EFFECTIVENESS;

EID: 35348913836     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1242531.1242563     Document Type: Conference Paper
Times cited : (5)

References (18)
  • 1
    • 35348871690 scopus 로고    scopus 로고
    • Report of Scientific Research (A) (15200002) granted by JSPS, (in Japanese)
    • M. Amamiya and et al. Research On the Kernel System based on Fine-grain Multithreading for Parallel and Distributed Processing. Report of Scientific Research (A) (15200002) granted by JSPS, (in Japanese), 2006.
    • (2006)
    • Amamiya, M.1    and et, al.2
  • 3
    • 35348899884 scopus 로고    scopus 로고
    • S. Amamiya, R. Hasegawa, H. Fujita, A. Hirano, and M. Amamiya. A language design for non-interruptible multithreading environment fuce. 2007. submitted to ISC2007
    • S. Amamiya, R. Hasegawa, H. Fujita, A. Hirano, and M. Amamiya. A language design for non-interruptible multithreading environment fuce. 2007. submitted to ISC2007
  • 8
    • 20344374162 scopus 로고    scopus 로고
    • Niagara: A 32-way multithreaded Sparc processor
    • P. Kongetira, K. Aingaran, and K. Olukotun. Niagara: a 32-way multithreaded Sparc processor. Micro, IEEE, 25(1):21-29, 2005.
    • (2005) Micro, IEEE , vol.25 , Issue.1 , pp. 21-29
    • Kongetira, P.1    Aingaran, K.2    Olukotun, K.3
  • 9
    • 35348820060 scopus 로고    scopus 로고
    • Scalability of Continuation-based Fine-grained Multithreading in Handing Multiple I/O Requests on Fuce
    • to appear in Frontier
    • S. Kusakabe, M. Izumi, S. Amamiya, Y. Nomura, H. Taniguchi, and M. Amamiya. Scalability of Continuation-based Fine-grained Multithreading in Handing Multiple I/O Requests on Fuce. to appear in Computing Frontier, 2007.
    • (2007) Computing
    • Kusakabe, S.1    Izumi, M.2    Amamiya, S.3    Nomura, Y.4    Taniguchi, H.5    Amamiya, M.6
  • 10
  • 12
    • 35348874613 scopus 로고    scopus 로고
    • MIPS Technolocies, MIPS32 Architecture For Programmers II: The MIPS32 Instruction Set.
    • MIPS Technolocies, MIPS32 Architecture For Programmers Volume II: The MIPS32 Instruction Set.
  • 17
    • 35348820308 scopus 로고    scopus 로고
    • U. T. Sigmund U. Evaluating a Multithreaded Superscalar Microprocessor Versus a Multiprocessor Chip. In Proceedings of the 4th PASA Workshop on Parallel Systems and Algorithms, pages 147-159, 1996.
    • U. T. Sigmund U. Evaluating a Multithreaded Superscalar Microprocessor Versus a Multiprocessor Chip. In Proceedings of the 4th PASA Workshop on Parallel Systems and Algorithms, pages 147-159, 1996.
  • 18
    • 2042458649 scopus 로고    scopus 로고
    • A survey of processors with explicit multithreading
    • T. Ungerer, B. Robič, and J. Šilc. A survey of processors with explicit multithreading. ACM Computing Surveys, 35(1):29-63, 2003.
    • (2003) ACM Computing Surveys , vol.35 , Issue.1 , pp. 29-63
    • Ungerer, T.1    Robič, B.2    Šilc, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.