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Volumn 54, Issue 9, 2007, Pages 775-779

RNS-to-binary converter for a new three-moduli set {2n+1- l,2n,2n- 1}

Author keywords

Digital signal processor (DSP); residue number system (RNS); reverse converters; three moduli sets

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BINARY IMAGES; COMPUTER ARCHITECTURE; DIGITAL SIGNAL PROCESSING;

EID: 34648840399     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2007.900844     Document Type: Article
Times cited : (97)

References (17)
  • 3
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    • A high-speed realization of residue to binary system converter
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    • S. J. Piestrak, “A high-speed realization of residue to binary system converter,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 10, pp. 661–663, Oct. 1995.
    • (1995) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process , vol.42 , Issue.10 , pp. 661-663
    • Piestrak, S.J.1
  • 4
    • 28244477506 scopus 로고    scopus 로고
    • Comments on ‘A high-speed realization of a residue to binary number system converter
    • Mar.
    • A. Dhurkadas, “Comments on ‘A high-speed realization of a residue to binary number system converter’,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 45, no. 3, pp. 446–447, Mar. 1998.
    • (1998) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process , vol.45 , Issue.3 , pp. 446-447
    • Dhurkadas, A.1
  • 14
    • 0024072353 scopus 로고
    • Fast conversion between binary and residue numbers
    • Sep.
    • G. Bi and E. V. Jones, “Fast conversion between binary and residue numbers,” Electron. Lett., vol. 24, pp. 1195–1197, Sep. 1988.
    • (1988) Electron. Lett. , vol.24 , pp. 1195-1197
    • Bi, G.1    Jones, E.V.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.