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Volumn , Issue , 2006, Pages 425-432

Reducing the data switching activity on serial link buses

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVITY FACTOR; CLOSED-FORM EXPRESSION; CMOS TECHNOLOGY; ENCODING SCHEMES; ON CHIP INTERCONNECT; PARALLEL LINE; STRONG SOLUTION; SWITCHING ACTIVITIES;

EID: 34548830605     PISSN: 19483287     EISSN: 19483295     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2006.111     Document Type: Conference Paper
Times cited : (15)

References (10)
  • 5
    • 0034481268 scopus 로고    scopus 로고
    • Bus energy minimization by transition pattern coding (TPC) in deep sub-micron technologies
    • Nov
    • P. Sotiriadis, and A. Chandrakasan, "Bus energy minimization by transition pattern coding (TPC) in deep sub-micron technologies," Proceedings of ICCAD, pp.322-327, Nov. 2000.
    • (2000) Proceedings of ICCAD , pp. 322-327
    • Sotiriadis, P.1    Chandrakasan, A.2
  • 6
    • 0038529371 scopus 로고    scopus 로고
    • A transition-encoded dynamic bus technique for highperformance interconnects
    • May
    • M. Anders, N. Rai, R. K. Krishnamurthy, S. Borkar, "A transition-encoded dynamic bus technique for highperformance interconnects," Journal of Solid-State Circuits, vol. 38, no. 5, pp. 709-714, May 2003.
    • (2003) Journal of Solid-State Circuits , vol.38 , Issue.5 , pp. 709-714
    • Anders, M.1    Rai, N.2    Krishnamurthy, R.K.3    Borkar, S.4
  • 7
    • 35048834531 scopus 로고
    • Bus-invert coding for low-power I/O
    • March
    • M. R. Stan and W. P. Burleson, "Bus-invert coding for low-power I/O," IEEE Trans. On VLSI Systems, vol. 3, no. 1, pp. 49-58, March 1995.
    • (1995) IEEE Trans. on VLSI Systems , vol.3 , Issue.1 , pp. 49-58
    • Stan, M.R.1    Burleson, W.P.2
  • 8
    • 0032628047 scopus 로고    scopus 로고
    • A coding framework for low-power address and data buses
    • June
    • S. Ramprasad, N. R. Shanbhag, and I. N. Hajj, "A coding framework for low-power address and data buses," IEEE Trans. on VLSI Systems, vol. 7, no. 2, pp. 212-221, June 1999.
    • (1999) IEEE Trans. on VLSI Systems , vol.7 , Issue.2 , pp. 212-221
    • Ramprasad, S.1    Shanbhag, N.R.2    Hajj, I.N.3
  • 9
    • 84886737871 scopus 로고    scopus 로고
    • Berkley Predictive Technology model
    • Berkley Predictive Technology model: "http://wwwdevice. eecs.berkeley.edu/~ptm".


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.