Memory optimized architecture for efficient Gauss-Jordan matrix inversion

Proceedings - 2007 3rd Southern Conference on Programmable Logic, SPL'07

Volumn , Issue , 2007, Pages 33-38

  De Matos, Gonçalo M ^a   Neto, Horácio C ^a  

^a INESC ID   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; COMPUTATION THEORY; DIGITAL ARITHMETIC; MATLAB; MATRIX ALGEBRA; PROGRAM PROCESSORS;

COMPUTING TECHNOLOGY; GAUSS-JORDAN MATRIX INVERSION; ON-BOARD MEMORY;

ALGORITHMS;

EID: 34548827967     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SPL.2007.371720     Document Type: Conference Paper

References (11)

1. P. Salmela, A. Happonen, A. Burian, and J. Takala, "Several approaches to fixed-point implementation of matrix inversion," in ISSCS 2005 - International Symposium on Signals, Circuits and Systems, vol. 2, July 2005, pp. 497-500.
2. F. Edman and V. Owall, "Implementation of a scalable matrix inversion architecture for triangular matrices," in IEEE 2003. International Symposium on Personal,Indoor and Mobile Radio Communication Proceedings, 2003.
3. K. Underwood and K. Hemmert, "Closing, the gap: Cpu and fpga trends in sustainable floating-point bias performance," in FCCM 2004. 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Apr. 2004, pp. 219-228.
4. Y. Dou, S. Vassiliadis, G. K. Kuzmanov, and G. N. Gaydadjiev, "64-bit, floating-point fpga matrix multiplication," in FPGA'05: Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays, Feb. 2005, pp. 86-95.
5. L. Zhuo and V. K. Prasanna, "High performance linear algebra operations on reconfigurable systems," in SC'05: Proceedings of the 2005 ACM/IEEE conference on Supercomputing, Nov. 2005.
6. G. Matos and H. Neto, "On reconfigurable architectures for efficient matrix inversion," in FPL 2006. International Conference on Field Programmable Logic Proceedings, 2006.
7. L. Zhuo and K. Prasanna, "High-performance and parameterized matrix factorization on fpgas," in FPL 2006. International Conference on Field Programmable Logic Proceedings, 2006.
8. K. Turkington, K. Masselos, G. Constantinides, and P. Leong, "Fpga based acceleration of the linpack benchmark: A high level code transformation approach," in FPL 2006. International Conference on Field Programmable Logic Proceedings, 2006.
9. Alpha-Data, ADM-XRC-II Reconfigurable Computer documentation, 2002, http://www.alpha-data.com/adm-xrcii.html.
10. Xilinx, Virtex-II Platform FPGAs: Functional Description, 2004, product Specification.
11. G. Matos, "Reconfigurable systems for acceleration of matrix operations (in portuguese)," Master's thesis. Technical University of Lisbon, Mar. 2006.