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Volumn , Issue , 2006, Pages 369-374
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On reconfigurable architectures for efficient matrix inversion
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Author keywords
[No Author keywords available]
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Indexed keywords
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
FUZZY LOGIC;
PRODUCT DEVELOPMENT;
STANDARDS;
FIELD PROGRAMMABLE LOGIC (FPL);
FLOATING POINT (FP);
INTERNATIONAL CONFERENCES;
LIMITED DATA;
MATRIX INVERSIONS;
MEMORY ACCESSES;
ON BOARD MEMORY (OBM);
RE CONFIGURABLE ARCHITECTURE;
RE CONFIGURABLE COMPUTING (RCC);
RECONFIGURABLE HARDWARE (RH);
RECONFIGURABLE PLAT FORMS;
RECONFIGURABLE SYSTEMS;
RUNNING IN;
SOFTWARE SOLUTIONS;
MATRIX ALGEBRA;
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EID: 46249132940
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/FPL.2006.311239 Document Type: Conference Paper |
Times cited : (21)
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References (10)
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