-
1
-
-
33745582290
-
A new vision of 'scalable' verification
-
Mar
-
B. Bailey, "A new vision of 'scalable' verification," EETimes, Mar. 2004.
-
(2004)
EETimes
-
-
Bailey, B.1
-
3
-
-
27844542862
-
An embedded debugging architecture for SoCs
-
Feb-Mar
-
R. Leatherman and N. Stollon, "An embedded debugging architecture for SoCs," IEEE Potentials, vol. 24, no. 1, pp. 12-16, Feb-Mar 2005.
-
(2005)
IEEE Potentials
, vol.24
, Issue.1
, pp. 12-16
-
-
Leatherman, R.1
Stollon, N.2
-
4
-
-
0035687174
-
Debug methodology for the McKinley processor
-
Washington, DC, USA: IEEE Computer Society
-
D. D. Josephson, S. Poehhnan, and V. Govan, "Debug methodology for the McKinley processor," in Proceedings of the IEEE International Test Conference. Washington, DC, USA: IEEE Computer Society, 2001, pp. 451-460.
-
(2001)
Proceedings of the IEEE International Test Conference
, pp. 451-460
-
-
Josephson, D.D.1
Poehhnan, S.2
Govan, V.3
-
5
-
-
33745725670
-
Debug support for complex systems on-chip: A review
-
July
-
A. Hopkins and K. McDonald-Maier, "Debug support for complex systems on-chip: A review," IEE Proceedings Computers and Digital Techniques, vol. 153, no. 4, pp. 197-207, July 2006.
-
(2006)
IEE Proceedings Computers and Digital Techniques
, vol.153
, Issue.4
, pp. 197-207
-
-
Hopkins, A.1
McDonald-Maier, K.2
-
6
-
-
0002677861
-
microSPARC: A case study of scan-based debug
-
K. Holdbrook, S. Joshi, S. Mitra, J. Petolino, R. Raman, and M. Wong, "microSPARC: A case study of scan-based debug." in Proceedings IEEE International Test Conference (ITC), 1994, pp. 70-75.
-
(1994)
Proceedings IEEE International Test Conference (ITC)
, pp. 70-75
-
-
Holdbrook, K.1
Joshi, S.2
Mitra, S.3
Petolino, J.4
Raman, R.5
Wong, M.6
-
8
-
-
0043136708
-
Advanced techniques for rtl debugging
-
Y. Hsu, B. Tabbara, Y. Chen, and F. Tsai, "Advanced techniques for rtl debugging," in Proceedings of the Design Automation Conference, 2003, pp. 362-367.
-
(2003)
Proceedings of the Design Automation Conference
, pp. 362-367
-
-
Hsu, Y.1
Tabbara, B.2
Chen, Y.3
Tsai, F.4
-
10
-
-
34548708917
-
Silicon debug
-
Oct
-
B. Vermeulen, Y.-C. Hsu, and R. Ruiz, "Silicon debug," Test and Measurement World, pp. 41-45, Oct. 2006.
-
(2006)
Test and Measurement World
, pp. 41-45
-
-
Vermeulen, B.1
Hsu, Y.-C.2
Ruiz, R.3
-
11
-
-
0036446214
-
Hierarchical data invalidation analysis for scan-based debug on multiple-clock system chips
-
Oct
-
S. K. Goel and B. Vermeulen, "Hierarchical data invalidation analysis for scan-based debug on multiple-clock system chips," in Proceedings IEEE International Test Conference (ITC), Oct. 2002, pp. 1103-1110.
-
(2002)
Proceedings IEEE International Test Conference (ITC)
, pp. 1103-1110
-
-
Goel, S.K.1
Vermeulen, B.2
-
12
-
-
0142184774
-
Latch Divergency in Microprocessor Failure Analysis
-
September/October
-
P. Dahlgren, P. Dickinson, and I. Parulkar, "Latch Divergency in Microprocessor Failure Analysis," in Proceedings of the IEEE International Test Conference, September/October 2003, pp. 755-763.
-
(2003)
Proceedings of the IEEE International Test Conference
, pp. 755-763
-
-
Dahlgren, P.1
Dickinson, P.2
Parulkar, I.3
-
13
-
-
15744374564
-
Transaction level modeling: Verification leaps ahead
-
Mar
-
B. Tabbara and K. Hashmi, "Transaction level modeling: Verification leaps ahead," EDA Tech Forum, pp. 14-17, Mar. 2005.
-
(2005)
EDA Tech Forum
, pp. 14-17
-
-
Tabbara, B.1
Hashmi, K.2
-
17
-
-
0036446081
-
Core-based Scan Architecture for Silicon Debug
-
Baltimore, MD, USA, Oct
-
B. Vermeulen, T. Waayers, and S. Goel, "Core-based Scan Architecture for Silicon Debug," in Proceedings IEEE International Test Conference (ITC), Baltimore, MD, USA, Oct. 2002, pp. 638-647.
-
(2002)
Proceedings IEEE International Test Conference (ITC)
, pp. 638-647
-
-
Vermeulen, B.1
Waayers, T.2
Goel, S.3
-
18
-
-
27344456043
-
The Æthereal network on chip: Concepts, architectures, and implementations
-
Sept-Oct
-
K. Goossens, J. Dielissen, and A. Rǎdulescu, "The Æthereal network on chip: Concepts, architectures, and implementations," IEEE Design and Test of Computers, vol. 22, no. 5, pp. 414-421, Sept-Oct 2005.
-
(2005)
IEEE Design and Test of Computers
, vol.22
, Issue.5
, pp. 414-421
-
-
Goossens, K.1
Dielissen, J.2
Rǎdulescu, A.3
-
19
-
-
33745183091
-
An event-based monitoring service for networks on chip
-
Oct
-
C. Ciordaş, T. Basten, A. Rǎdulescu, K. Goossens, and J. van Meerbergen, "An event-based monitoring service for networks on chip," ACM Transactions on Design Automation of Electronic Systems, vol. 10, no. 4, pp. 702-723, Oct. 2005.
-
(2005)
ACM Transactions on Design Automation of Electronic Systems
, vol.10
, Issue.4
, pp. 702-723
-
-
Ciordaş, C.1
Basten, T.2
Rǎdulescu, A.3
Goossens, K.4
van Meerbergen, J.5
-
20
-
-
34547268023
-
NoC monitoring: Impact on the design flow
-
May
-
C. Ciordaş, K. Goossens, A. Rǎdulescu, and T. Basten, "NoC monitoring: Impact on the design flow," in Proc. Int'l Symposium on Circuits and Systems (ISCAS), May 2006, pp. 1981-1984.
-
(2006)
Proc. Int'l Symposium on Circuits and Systems (ISCAS)
, pp. 1981-1984
-
-
Ciordaş, C.1
Goossens, K.2
Rǎdulescu, A.3
Basten, T.4
|