Systematic methodology for designing low power direct digital frequency synthesisers

IET Circuits, Devices and Systems

Volumn 1, Issue 4, 2007, Pages 293-304

  Kesoulis, M ^a   Soudris, D ^a   Koukourlis, C ^a   Thanailakis, A ^a  

^a DEMOCRITUS UNIVERSITY OF THRACE   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; COSTS; DIGITAL CIRCUITS; ELECTRIC POWER UTILIZATION; ROM; TABLE LOOKUP;

FUNCTIONAL MAPPING; MEMORY SEGMENTATION; MEMORY SIZE;

FREQUENCY SYNTHESIZERS;

EID: 34548249069     PISSN: 1751858X     EISSN: None     Source Type: Journal    
DOI: 10.1049/iet-cds:20060029     Document Type: Article

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