High-performance direct digital frequency synthesizers in 0.25 μm CMOS using dual-slope approximation

IEEE Journal of Solid-State Circuits

Volumn 40, Issue 11, 2005, Pages 2220-2227

  De Caro, Davide ^a   Strollo, Antonio Giuseppe Maria ^a  

^a UNIVERSITY OF NAPLES FEDERICO II   (Italy)

Author keywords

CMOS digital integrated circuits; Digital arithmetic; Flip flops; Frequency synthesizers; High speed integrated circuits; Signal synthesis

Indexed keywords

CMOS DIGITAL INTEGRATED CIRCUITS; HIGH-SPEED INTEGRATED CIRCUITS; LINEAR APPROXIMATION; SIGNAL SYNTHESIS;

APPROXIMATION THEORY; CMOS INTEGRATED CIRCUITS; DIGITAL ARITHMETIC; FLIP FLOP CIRCUITS; NATURAL FREQUENCIES; OPTIMIZATION; SIGNAL PROCESSING;

FREQUENCY SYNTHESIZERS;

EID: 27844440775     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2005.857371     Document Type: Article

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