Diffusion control techniques for TiN stacked metal gate electrodes for p-type metal insulator semiconductor field effect transistors

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 46, Issue 4 B, 2007, Pages 1859-1864

  Sakashita, Shinsuke ^a   Kawahara, Takaaki ^a   Mizutani, Masaharu ^a   Inoue, Masao ^a   Mori, Kenichi ^a   Yamanari, Shinichi ^a   Higashi, Masahiko ^a   Nishida, Yukio ^a   Honda, Kazuhito ^a   Murata, Naofumi ^a   Tsuchimoto, Junichi ^a   Yugami, Jiro ^a   Yoshimura, Hidefumi ^a   Yoneda, Masahiro ^a  

^a RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

CVD; Diffusion; Fermi level pinning; HfSiON; Metal gate; TiN; Work function

Indexed keywords

CHEMICAL VAPOR DEPOSITION; FERMI LEVEL; INTERDIFFUSION (SOLIDS); MISFET DEVICES; POLYSILICON; TITANIUM NITRIDE;

DIFFUSION CONTROL TECHNIQUES; GATE ELECTRODES; METAL GATES; TIN FILMS;

GATE DIELECTRICS;

EID: 34547911850     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.46.1859     Document Type: Article

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