A low power and small area FFT processor for OFDM demodulator

IEEE Transactions on Consumer Electronics

Volumn 53, Issue 2, 2007, Pages 274-277

  Li, Xiaojin ^a   Lai, Zongsheng ^a   Cui, Jianmin ^b  

^a EAST CHINA NORMAL UNIVERSITY   (China)

^b College of Information Sci and Eng ^*  (China)

Author keywords

FFT; OFDM; Radix 2 4 butterfly

Indexed keywords

DIGITAL SIGNAL PROCESSORS; FAST FOURIER TRANSFORMS; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; RADIO TRANSMISSION; WIRELESS TELECOMMUNICATION SYSTEMS;

DIGITAL VIDEO BROADCASTING; DISTRIBUTED MEMORY ARCHITECTURE;

DEMODULATORS;

EID: 34547673640     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCE.2007.381685     Document Type: Article

References (11)

1. J. A. C. Bingham, "Multicarrier modulation for data transmission: An idea whose time has come," IEEE Commun. Mag., vol. 28, no. 5, pp. 514, May 1990.
2. ETSI: European Telecommunication Standard ETS 300 744 Digital Broadcasting Systems for Television, Sound, and Data Services; Framing Structure, Channel Coding and Modulation for Digital Terrestrial Television, 2004
3. Haining Jiang, Hanwen Luo, Jifeng Tian and Wentao Song, "Design of an Efficient FFT processor for OFDM Systems," IEEE Trans. Consumer Electron., vol. 51, no. 4, pp. 1099-1103, Nov. 2005.
4. Chi-Hong Su, Jen-Ming Wu, "Reconfigurable FFT Design for Low Power OFDM Communication Systems," IEEE Trans. Circuits Syst. Video Technol. vol. 6, no. 2, pp. 191-199, Apr. 2006.
5. Chia-Chyang Chen, Chyh-Chyang Lee and Chih-Jen Cheng, "A low-power VLSI architecture for a shared-memory FFT processor with a mixed-radix algorithm and a simple memory control scheme," IEEE International Symposium on Circuits and System., pp. 21-24, May 2006.
6. Hasan, M., Arslan, T. and Thompson, J.S., "A novel coefficient ordering based low power pipelined radix-4 FFT processor for wireless LAN applications," IEEE Trans. Consumer Electron., vol. 49, no. 1, pp. 128-134, Nov. 2003.
7. Y Jung, H. Yoon, and J. Kim, "New efficient FFT algorithm and pipeline implementation results for OFDM/DMT applications," IEEE Trans. Consumer Electron., vol. 49, no. 1, pp. 1099-1103, Feb. 2003.
8. Sang-Chul Moon and In-Cheol Park, "Area-efficient memory-based architecture for FFT processing,", Proceedings of the 2003 International Symposium on Circuits and Systems, vol. 5, May 2003.
9. Takala J.H., Jarvinen T.S., and Sorokin H.T., "A Conflict-free parallel memory access scheme for FFT processors," in Proc. IEEE Int. Symp. Circuit Syst., 2003, vol. 4, pp. 524-527.
10. Chua-Chin, Jian-Ming Huang, and Hsian-Chang Cheng, "A 2K/8K mode small-area FFT processor for OFDM demodulator of DVB-T Receivers," IEEE Trans. Consumer Electron., vol. 51, no. 1, pp. 28-32, Feb. 2005.
11. R. Radhouane, P. Liu, and C. Modlin, "Minimizing the memory requirement for continuous flow FFT implementation: Continous flow mixed mode FFT (CFMM-FFT)," Proc. IEEE Int. Symp. Circuit Syst., vol. 1, pp. 133-136, 2001.