A mixed analog/digital asynchronous processor for cortical computations in 3D SOI-CMOS

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2006, Pages 4955-4958

  Georgiou, Julius ^a   Andreou, Andreas G ^b   Pouliquen, Philippe O ^b  

^a UNIVERSITY OF CYPRUS   (Cyprus)

^b Johns Hopkins University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; PHOTOSENSITIVITY; PIXELS; SILICON ON INSULATOR TECHNOLOGY; THREE DIMENSIONAL;

CORTICAL COMPUTATIONS; PHOTOSENSITIVE PIXEL ARRAY; SYSTEM LEVEL ARCHITECTURE;

ASYNCHRONOUS GENERATORS;

EID: 34547333491     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)

1. H. Kurino, K. W. Lee, T. Nakamura, K. Sakuma, N. Miyakawa, H. Shimazutsu, K. Kim, and M. Koyanagi, "Intelligent image sensor chip with three dimensions structure," in IEEE International Electron Devices Meeting, pp. 879-882, 1999.
2. Goldberg, D.H., Cauwenberghs, G. and Andreou, A.G. "Probabilistic Synaptic Weighting in a Reconfigurable Network of VLSI integrate-and-fire Neurons", Neural Networks 14 (2001) 781-793
3. Choi, T.Y.W., Shi, B.E., Boahen, K. "An ON-OFF Orientation Selective Address. Event Representation Image Transceiver Chip", IEEE Trans. CAS-I, vol 51, no 2, pp 342-353, 2004.
4. Serrano-Gottaredona, T., Andreou, A.G., Linares-Barranco, B. "AER Image Filtering Architecture for Vision-Processing Systems", IEEE Trans. CAS-I, Vol 46., No.9, Sept 1999.
5. Van Rullen, R., Gautrais, J., Delorme, A. and Thorpe, S. "Face Processing Using One Spike Per Neuron", BioSystems, 48:229-239, 1998.
6. Thorpe, S. "Ultra-Rapid Scene Categorisation with a Wave of Spikes", In H.H. Bulthoff et al (eds), Biologically Motivated Computer Vision, Lecture Notes in Computer Science, 2525, pp1-15, Springer-Verlag, Berlin.
7. VanRullen, R. and Thorpe, S.J., "Surfing a Spike Wave Down the Ventral Stream", Vision Research 42(2002) 2593-2615.
8. X. Qi, X. Guo, and J.G. Harris, "A time-to-first spike CMOS imager". Proceedings of IEEE ISCAS 2004 proceedings, p. 824, vol. 1, 2004.
9. Boahen, K. "Point-to-Pbint Connectivity Between Neuromorphic, Chips using Address-Events", IEEE Trans. CAS-II, vol 47 no 5, pp 416-434, 2000.
10. Boahen, K. "A Burst-Mode Word-Serial Address-Event Channel-I: Transmitter Design, IEEE Trans. CAS-I, vol 51, no 7, pp 1269-1280, July 2004.
11. Grossherg, S. and Mingolla, E. "Neural dynamics of perceptual grouping: Textures. Boundaries, and emergent segmentaions", Perception & Psychophysics, 38(2):141-171, 1985.
12. Boahen, K. "A Burst-Mode Word-Serial Address-Event Channel-II: Receiver Design, IEEE Trans. CAS-I, vol 51, no 7, pp 1281-1291, July 2004.
13. nd Feb 2006, Vol. 42, 3, p. 170-171
14. J. Burns, et al "An SOI three-dimensional integrated circuit technology," in IEEE International SOI Conference, pp. 20-21, October 2000.
15. V. Suntharalingam, et al "CMOS image sensor fabricated in three-dimensional integrated Circuit technology," in IEEE International Solid-State Circuits Conference, vol, 1, 356-357, February 2005.