SOI-based three-dimensional integrated circuit technology

IEEE International SOI Conference

Volumn , Issue , 2000, Pages 20-21

  Burns, J ^a   McIlrath, L ^a   Hopwood, J ^a   Keast, C ^a   Vu, D P ^a   Warner, K ^a   Wyatt, P ^a  

^a MIT LINCOLN LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DATA STORAGE EQUIPMENT; IMAGING TECHNIQUES; INTEGRATED CIRCUIT MANUFACTURE; LOGIC DEVICES; MICROPROCESSOR CHIPS; OSCILLATORS (ELECTRONIC);

IMAGER WAFERS; THREE-DIMENSIONAL INTEGRATED CIRCUITS (3D-ICS);

SILICON ON INSULATOR TECHNOLOGY;

EID: 0034471101     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)