Probabilistic synaptic weighting in a reconfigurable network of VLSI integrate-and-fire neurons

Neural Networks

Volumn 14, Issue 6-7, 2001, Pages 781-793

  Goldberg, David H ^a   Cauwenberghs, Gert ^a   Andreou, Andreas G ^a  

^a Johns Hopkins University   (United States)

Author keywords

Address event representation; Analog VLSI; Integrate and fire neuron; Probabilistic synapse; Spiking neuron

Indexed keywords

IMAGE PROCESSING; MULTICHIP MODULES; PROBABILISTIC LOGICS; TABLE LOOKUP; VLSI CIRCUITS;

ACTIVE NEURONS; PROBABILISTIC SYNAPSES;

NEURAL NETWORKS;

ARTICLE; ARTIFICIAL NEURAL NETWORK; BRAIN NERVE CELL; CELL COMMUNICATION; EXPERIMENTAL MODEL; IMAGE PROCESSING; MEMORY; PRIORITY JOURNAL; SPIKE; SYNAPTIC TRANSMISSION; TECHNOLOGY;

ACTION POTENTIALS; ANIMALS; HUMANS; IMAGE INTERPRETATION, COMPUTER-ASSISTED; MICROCOMPUTERS; MODELS, STATISTICAL; NERVE NET; NEURAL NETWORKS (COMPUTER); NEURONS; SYNAPTIC TRANSMISSION;

EID: 0034762808     PISSN: 08936080     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0893-6080(01)00057-0     Document Type: Article

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