Seeing the forest and the trees: Steiner Wirelength optimization in placement

Proceedings of the International Symposium on Physical Design

Volumn 2006, Issue , 2006, Pages 78-85

  Roy, Jarrod A ^a   Lu, James F ^a   Markov, Igor L ^a  

^a University of Michigan   (United States)

Author keywords

Physical Design; Placement; Routing; Steiner Tree

Indexed keywords

CONGESTION CONTROL (COMMUNICATION); GLOBAL OPTIMIZATION; ROUTERS;

PHYSICAL DESIGN; PLACEMENT; ROUTING; STEINER TREE;

GEOGRAPHIC INFORMATION SYSTEMS;

EID: 33745941915     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (25)

1. A. Agnihotri et al., "Fractional Cut: Improved Recursive Bisection Placement," ICCAD, pp. 307-310, 2003.
2. U. Brenner and A. Rohe, "An Effective Congestion Driven Placement Framework," ISPD, pp. 6-11, San Diego, 2002.
3. A. E. Caldwell, A. B. Kahng, and I. L. Markov, "Can Recursive Bisection Alone Produce Routable Placements?," DAC, pp. 477-482, Los Angeles, June 2000.
4. A. E. Caldwell, A. B. Kahng, and I. L. Markov, "Design and Implementation of Move-based Heuristics for VLSI Hypergraph Partitioning," ACM J. of Experimental Algorithms, vol. 5, 2000.
5. A. E. Caldwell, A. B. Kahng, and I. L. Markov, "Optimal Partitioners and End-case Placers for Top-down Placement," IEEE Trans. on CAD, vol. 19, no. 11, pp. 1304-1314, 2000.
6. C. C. Chang, J. Cong, M. Romesis and M. Xie, "Optimality and Scalabiity Study of Existing Placement Algorithms," IEEE Trans. on CAD, pp. 537-549, April 2004.
7. [71 T. C. Chen, Y. W. Chang and S. C. Lin, "IMF: Interconnect-Driven Multilevel Floorplanning for Large-Scale Building-Module Designs," ICCAD, pp. 159-164, November 2005.
8. C. C. N. Chu, "FLUTE: Fast Lookup Table Based Wirelength Estimation Technique," ICCAD, pp. 696-701, 2004.
9. A. E. Dunlop and B. W. Kernighan, "A Procedure for Placement of Standard Cell VLSI Circuits," IEEE Trans. on CAD, vol. 4, no. 1, pp. 92-98, 1985.
10. C. M. Fiduccia and R. M. Mattheyses, "A Linear Time Heuristic for Improving Network Partitions," DAC, pp. 175-181, 1982.
11. M. R. Garey and D. S. Johnson, "The Rectilinear Steiner Problem is NP-Complele," SIAM Journal of Applied Mathematics, vol. 32, pp. 826-834, 1977.
12. D. J.-H. Huang, and A. B. Kahng, "Partitioning-based Standard-cell Global Placement With an Exact Objective," ISPD, pp. 18-25, 1997.
13. D. Jariwala and J. Lillis, "Interactions Between Routing and Detailed Placement," ICCAD, pp. 387-393, 2004.
14. A.B. Kahng and G. Robins, "A New Class of Iterative Steiner Tree Heuristics With Good Performance," IEEE Trans. on CAD, vol. 11, no. 7, pp. 893-902, July 1992.
15. A. B. Kahng and X. Xu, "Accurate Pseudo-constructive Wirelength and Congestion Estimation," SLIP, pp. 81-86, 2003.
16. A. B. Kahng, I.I. Mandoiu and A. Zelikovsky, "Highly Scalable Algorithms for Rectilinear and Octilinear Steiner Trees," ASPDAC, pp. 827-833, 2003.
17. A. B. Kahng and Q. Wang, "Implementation and Extensibility of an Analytic Placer," IEEE Trans. on CAD, vol. 25, no. 5, pp. 734-747, May 2005.
18. C. Li, M. Xie, C. K. Koh, J. Cong and P. H. Madden, "Routability- driven Placement and White Space Allocation," ICCAD, pp. 394-401, 2004.
19. J. A. Roy, S. N. Adya, D. A. Papa and I. L. Markov, "Min-cul Floorplacemenl," to appear IEEE Trans. on CAD, 2006.
20. N. Selvakkumaran, P. Parakh and G. Karypis, "Perimeter-degree: A Priori Metric for Directly Measuring and Homogenizing Interconnection Complexity in Multilevel Placement," SLIP, pp. 53-59, 2003.
21. N. Selvakkumaran and G. Karypis, "Theto - A Fast, Scalable and High-quality Partitioning Driven Placement Tool," Technical report, University of Minnesota, 2004.
22. P. Suaris and G. Kedem, "Quadrisection: A New Approach to Standard Cell Layout," ICCAD, pp. 474-477, 1987.
23. K. Takahashi et al, "Min-cut Placement with Global Objective Functions for Large Scale Sea-of-gates Arrays," IEEE Trans. on CAD, vol. 14, no. 4, pp. 434-446, 1995.
24. J. Westra, C. Bartels and P. Groeneveld, "Probabilistic Congestion Prediction," ISPD, pp. 204-209, 2004.
25. X. Yang, B. K. Choi, and M. Sarrafzadeh, "Routability Driven White Space Allocation for Fixed-die Standard-cell Placement," ISPD, pp. 42-49, 2002.