Time-interleaved analog-to-digital converters: Status and future directions

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2006, Pages 3386-3389

  Vogel, Christian ^a   Johansson, Håkan ^b  

^a GRAZ UNIVERSITY OF TECHNOLOGY   (Austria)

^b LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL ESTIMATION; COMMUNICATION CHANNELS (INFORMATION THEORY); DIGITAL SIGNAL PROCESSING; SAMPLING; SIGNAL ANALYSIS;

CHANNEL MISMATCH CORRECTION; CHANNEL MISMATCH IDENTIFICATION; SAMPLING RATE; TIME INTERLEAVING;

ANALOG TO DIGITAL CONVERSION;

EID: 34547255492     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (29)

1. K. Poulton, R. Neff, B. Setterberg, B. Wuppermann, T. Kopley, R. Jewett, J. Pernillo, C. Tan, and A. Montijo, "A 20 GS/s 8 b ADC with a 1 MB memory in 0.18 μm CMOS," in IEEE International Solid-State Circuits Conference, vol. 1, February 2003, pp. 318-196.
2. B. Murmann and B. E. Boser, Digitally Assisted Pipeline ADCs: Theory and Implementation. Springer, 2004.
3. A. Papoulis, "Generalized sampling expansion," IEEE Trans. on Circuits and Systems, vol. 23, no. 11, pp. 652- 654, November 1977.
4. J. J. Brown, "Multi-channel sampling of low-pass signals," IEEE Trans. on Circuits and Systems, vol. 28, no. 2, pp. 101-106, February 1981.
5. A. Petraglia and S. K. Mitra, "High-speed A/D conversion incorporating a QMF bank," IEEE Trans. on Instrumentation and Measurement, vol. 41, no. 3, pp. 427-431, June 1992.
6. S. R. Velazquez, T. Q. Nguyen, and S. R. Broadstone, "Design of hybrid filter banks for analog/digital conversion," IEEE Trans. on Signal Processing, vol. 46, no. 4, pp. 956-967, April 1998.
7. P. Löwenborg, H. Johansson, and L. Wanhammar, "Two-channel digital and hybrid analog/digital multirate filter banks with very low-complexity analysis or synthesis filters," IEEE Trans. on Circuits and Systems II: Analog and Digital Signal Processing, vol. 50, no. 7, pp. 355- 367, July 2003.
8. W. C. Black Jr. and D. A. Hodges, "Time-interleaved converter arrays," IEEE J. of Solid State Circuits, vol. 15, no. 6, pp. 1024-1029, December 1980.
9. D. Draxelmayr, "A 6b 600MHz 10mW ADC array in digital 90nm CMOS," in 2004 IEEE International Solid-State Circuits Conference, vol. 1, February 2004, pp. 45-48.
10. M. Kozak and I. Kale, Oversampled Delta-Sigma Modulators: Analysis, Applications and Novel Topologies. Kluwer Academic Publishers, 2003.
11. A. van Roermund, H. Hegt, P. Harpe, G. Radulov, A. Zanikopoulos, K. Doris, and P. Quinn, "Smart AD and DA converters," in IEEE International Symposium on Circuits and Systems, vol. 6, May 2005, pp. 4062-4065.
12. C. Vogel, "The impact of combined channel mismatch effects in time-interleaved ADCs," IEEE Trans. on Instrumentation and Measurement, vol. 54, no. 1, pp. 415-427, February 2005.
13. C. Vogel and G. Kubin, "Modeling of time-interleaved ADCs with nonlinear hybrid filter banks," AEÜ-International J. of Electronics and Communications, vol. 59, no. 5, pp. 288-296, 2005.
14. K. Dyer, F. Daihong, S. Lewis, and P. Hurst, "An analog background calibration technique for time-interleaved analog-to-digital converters," IEEE J. of Solid-State Circuits, vol. 33, no. 12, pp. 1912-1919, December 1998.
15. C. Vogel, D. Draxelmayr, and F. Kuttner, "Compensation of timing mismatches in time-interleaved analog-to-digital converters through transfer characteristics tuning," in Proceedings of the 47th IEEE International Midwest Symposium On Circuits and Systems, vol. 1, July 2004, pp. 341-344.
16. H. Jin and E. K. F. Lee, "A digital-background calibration technique for minimizing timing-error effects in time-interleaved ADCs," IEEE Trans. on Circuits and Systems II: Analog and Digital Signal Processing, vol. 47, no. 7, pp. 603-613, July 2000.
17. S. Jamal, D. Fu, M. Singh, P. Hurst, and S. Lewis, "Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter," IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 51, no. 1, pp. 130-139, January 2004.
18. M. Seo, M. Rodwell, and U. Madhow, "Comprehensive digital correction of mismatch errors for a 400-Msamples/s 80-dB SFDR time-interleaved analog-to-digital converter," IEEE Trans. on Microwave Theory and Techniques, vol. 53, no. 3, pp. 1072-1082, April 2005.
19. H. Johansson and P. Löwenborg, "Reconstruction of nonuniformly sampled bandlimited signals by means of time-varying discrete-time FIR filters," to appear in J. Applied Signal Processing - Special Issue on Frames and Overcomplete Representations in Signal Processing, Communications, and Information Theory, 2006.
20. R. Prendergast, B. Levy, and P. Hurst, "Reconstruction of band-limited periodic nonuniformly sampled signals through multirate filter banks," IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 51, no. 8, pp. 1612-1622, August 2004.
21. C. Vogel, D. Draxelmayr, and G. Kubin, "Spectral shaping of timing mismatches in time-interleaved analog-to-digital converters," in Proceedings of the 2005 IEEE International Symposium on Circuits and Systems, May 2005, pp. 1394-1397.
22. Y. C. Jenq, "Perfect reconstruction of digital spectrum from nonuniformly sampled signals," IEEE Trans. on Instrumentation and Measurement, vol. 46, no. 7, pp. 649 - 652, June 1997.
23. Y. C. Eldar and A. V. Oppenheim, "Filterbank reconstruction of bandlimited signals from nonuniform and generalized samples," IEEE Trans. on Signal Processing, vol. 48, no. 10, pp. 2864-2875, October 2000.
24. H. Johansson and P. Löwenborg, "Reconstruction of nonuniformly sampled bandlimited signals by means of digital fractional delay filters," IEEE Trans. on Signal Processing, vol. 50, no. 11, pp. 2757- 2767, November 2002.
25. Y C. Jenq, "Digital spectra of nonuniformly sampled signals: A robust sampling time offset estimation algorithm for ultra high-speed waveform digitizers using interleaving," IEEE Trans. on Instrumentation and Measurement, vol. 39, no. 1, pp. 71-75, February 1990.
26. J. Pereira, P. Girao, and A. Serra, "An FFT-based method to evaluate and compensate gain and offset errors of interleaved ADC systems," IEEE Trans. on Instrumentation and Measurement, vol. 53, no. 2, pp. 423-430, April 2004.
27. D. Fu, K. C. Dyer, S. H. Lewis, and P. J. Hurst, "A digital background calibration technique for time-interleaved analog-to-digital converters," IEEE J. of Solid-State Circuits, vol. 33, no. 12, pp. 1904-1911, December 1998.
28. V Ferragina, A. Fornasari, U. Gatti, P. Malcovati, and F. Maloberti, "Gain and offset mismatch calibration in time-interleaved multipath A/D sigma-delta modulators," IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 51, no. 12, pp. 2365-2373, December 2004.
29. J. Elbornsson, F. Gustafsson, and J. E. Eklund, "Blind adaptive equalization of mismatch errors in a time-interleaved A/D converter system," IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 51, no. 1, pp. 151-158, January 2004.