Statistical logic cell delay analysis using a current-based model

Proceedings - Design Automation Conference

Volumn , Issue , 2006, Pages 253-256

  Fatemi, Hanif ^a   Nazarian, Shahin ^a   Pedram, Massoud ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

Crosstalk noise; Process variations; Statistical gate timing analysis

Indexed keywords

CAPACITANCE; MARKOV PROCESSES; MONTE CARLO METHODS; STATISTICAL METHODS; TABLE LOOKUP; TIMING CIRCUITS;

CELL DELAY MODEL; CELL PARASITIC CAPACITANCES; CURRENT-BASED MODEL; OUTPUT VOLTAGE;

LOGIC CIRCUITS;

EID: 34547217038     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1146909.1146975     Document Type: Conference Paper

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