-
1
-
-
34447527367
-
Highly manufacturable 45 nm LSTP CMOSFETs using novel dual high-κ and dual metal gate CMOS integration
-
S. C. Song, Z. B. Zhang, M. M. Hussain, C. Huffman, J. Barnett, S. H. Bae, H. J. Li, P. Majhi, C. S. Park, B. S. Ju, H. K. Park, C. Y. Kang, R. Choi, P. Zeitzoff, H. H. Tseng, B. H. Lee, and R. Jammy, "Highly manufacturable 45 nm LSTP CMOSFETs using novel dual high-κ and dual metal gate CMOS integration," in Proc. IEEE VLSI Symp., 2006, pp. 2-4.
-
(2006)
Proc. IEEE VLSI Symp
, pp. 2-4
-
-
Song, S.C.1
Zhang, Z.B.2
Hussain, M.M.3
Huffman, C.4
Barnett, J.5
Bae, S.H.6
Li, H.J.7
Majhi, P.8
Park, C.S.9
Ju, B.S.10
Park, H.K.11
Kang, C.Y.12
Choi, R.13
Zeitzoff, P.14
Tseng, H.H.15
Lee, B.H.16
Jammy, R.17
-
2
-
-
24144497145
-
Thermal stability of hafnium-silicate and plasmanitrided hafnium silicate films studied by Fourier transform infrared spectroscopy
-
Jul
-
M. A. Quevedo-Lopez, J. J. Chambers, M. R. Visokay, A. Shanware, and L. Colombo, "Thermal stability of hafnium-silicate and plasmanitrided hafnium silicate films studied by Fourier transform infrared spectroscopy," Appl. Phys. Lett., vol. 87, no. 1, p. 012 902, Jul. 2005.
-
(2005)
Appl. Phys. Lett
, vol.87
, Issue.1
, pp. 012-902
-
-
Quevedo-Lopez, M.A.1
Chambers, J.J.2
Visokay, M.R.3
Shanware, A.4
Colombo, L.5
-
3
-
-
31144455203
-
Effect of thickness on the crystallization of ultrathin HfSiON gate dielectrics
-
Jan
-
G. Pant, A. Gnade, M. J. Kim, R. M. Wallace, and B. E. Gnade, "Effect of thickness on the crystallization of ultrathin HfSiON gate dielectrics," Appl. Phys. Lett., vol. 88, no. 3, p. 032 901, Jan. 2006.
-
(2006)
Appl. Phys. Lett
, vol.88
, Issue.3
, pp. 032-901
-
-
Pant, G.1
Gnade, A.2
Kim, M.J.3
Wallace, R.M.4
Gnade, B.E.5
-
4
-
-
0037451239
-
3-performance TaN/HfSiON/Si metal-oxide-semiconductor structures prepared by post-deposition anneal
-
Mar
-
3-performance TaN/HfSiON/Si metal-oxide-semiconductor structures prepared by post-deposition anneal," Appl. Phys. Lett., vol. 82, no. 11, pp. 1757-1759, Mar. 2003.
-
(2003)
Appl. Phys. Lett
, vol.82
, Issue.11
, pp. 1757-1759
-
-
Akbar, M.S.1
Gopalan, S.2
Cho, H.-J.3
Onishi, K.4
Choi, R.5
Nieh, R.6
Kang, C.S.7
Kim, Y.H.8
Han, J.9
Krishnan, S.10
Lee, J.C.11
-
5
-
-
33646943846
-
Fabrication of high-mobility nitrided hafnium silicate gate dielectrics with sub-1-nm equivalent oxide thickness using plasma nitridation and high-temperature postnitridation annealing
-
S. Inumiya, T. Miura, K. Shirai, T. Matsuki, K. Torii, and Y. Nara, "Fabrication of high-mobility nitrided hafnium silicate gate dielectrics with sub-1-nm equivalent oxide thickness using plasma nitridation and high-temperature postnitridation annealing," Jpn. J. Appl. Phys., vol. 45, no. 4B, p. 2898, 2006.
-
(2006)
Jpn. J. Appl. Phys
, vol.45
, Issue.4 B
, pp. 2898
-
-
Inumiya, S.1
Miura, T.2
Shirai, K.3
Matsuki, T.4
Torii, K.5
Nara, Y.6
-
6
-
-
33644505487
-
Suppression of phase separation in Hf-silicate films using NH3 annealing treatment
-
Feb
-
K. B. Chung, C. N. Whang, M.-H. Cho, C. J. Yim, and D.-H. Kochung, "Suppression of phase separation in Hf-silicate films using NH3 annealing treatment," Appl. Phys. Lett., vol. 88, no. 8, p. 081 903, Feb. 2006.
-
(2006)
Appl. Phys. Lett
, vol.88
, Issue.8
, pp. 081-903
-
-
Chung, K.B.1
Whang, C.N.2
Cho, M.-H.3
Yim, C.J.4
Kochung, D.-H.5
-
7
-
-
33947619476
-
Correlation of phase segregation and electrical properties of low-power MOSFETs with Hf-based silicate gate dielectric layers and TaN metal gates
-
presented at the, Warrendale, PA, Paper E07-04
-
J. Pétry, Z. M. Rittersma, G. Vellianitis, V. Cosnier, T. Conard, W. Deweerd, and J. Van Berkum, "Correlation of phase segregation and electrical properties of low-power MOSFETs with Hf-based silicate gate dielectric layers and TaN metal gates," presented at the Gate Stack Scaling-Materials Selection, Role of Interfaces, and Reliability Implications, vol. 917E, Warrendale, PA, 2006, Paper E07-04.
-
(2006)
Gate Stack Scaling-Materials Selection, Role of Interfaces, and Reliability Implications
, vol.917 E
-
-
Pétry, J.1
Rittersma, Z.M.2
Vellianitis, G.3
Cosnier, V.4
Conard, T.5
Deweerd, W.6
Van Berkum, J.7
-
8
-
-
33745661890
-
Device performance characterisation with continuously graded interface layer between silicon and high-κ dielectrics
-
B. J. O'Sullivan, V. S. Kaushik, L.-Å. Ragnarsson, B. Onsia, N. Van Hoornick, E. Rohr, S. DeGendt, and M. Heyns, "Device performance characterisation with continuously graded interface layer between silicon and high-κ dielectrics," IEEE Electron Device Lett., vol. 27, no. 7, p. 546, 2006.
-
(2006)
IEEE Electron Device Lett
, vol.27
, Issue.7
, pp. 546
-
-
O'Sullivan, B.J.1
Kaushik, V.S.2
Ragnarsson, L.-Å.3
Onsia, B.4
Van Hoornick, N.5
Rohr, E.6
DeGendt, S.7
Heyns, M.8
-
9
-
-
20844445585
-
Environment of hafnium and silicon in Hf-based dielectric films: An atomistic study by X-ray absorption spectroscopy and X-ray diffraction
-
J. Morais, L. Miotti, K. P. Bastos, S. R. Teixeira, I. J. R. Baumvol, A. L. P. Rotondaro, J. J. Chambers, M. R. Visokay, L. Colombo, and M. C. Martins Alves, "Environment of hafnium and silicon in Hf-based dielectric films: An atomistic study by X-ray absorption spectroscopy and X-ray diffraction," Appl. Phys. Lett., vol. 86, no. 21, p. 2906, 2005.
-
(2005)
Appl. Phys. Lett
, vol.86
, Issue.21
, pp. 2906
-
-
Morais, J.1
Miotti, L.2
Bastos, K.P.3
Teixeira, S.R.4
Baumvol, I.J.R.5
Rotondaro, A.L.P.6
Chambers, J.J.7
Visokay, M.R.8
Colombo, L.9
Martins Alves, M.C.10
|