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Volumn 18, Issue 8, 2007, Pages 847-854
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A thermally robust Ni-FUSI process using in 65 nm CMOS technology
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Author keywords
[No Author keywords available]
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Indexed keywords
FULLY SILICIDED (FUSI) GATE;
NICKEL SILICIDE LAYER;
POLY-GATE FORMATION;
AGGLOMERATION;
ANNEALING;
ATOMIC FORCE MICROSCOPY;
CMOS INTEGRATED CIRCUITS;
CONTACT RESISTANCE;
FABRICATION;
MORPHOLOGY;
PHASE TRANSITIONS;
THERMAL CONDUCTIVITY;
THERMODYNAMIC STABILITY;
X RAY DIFFRACTION ANALYSIS;
GATES (TRANSISTOR);
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EID: 34249877198
PISSN: 09574522
EISSN: 1573482X
Source Type: Journal
DOI: 10.1007/s10854-006-9088-1 Document Type: Article |
Times cited : (8)
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References (19)
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