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Volumn 1, Issue 4, 2004, Pages 369-388

The Optimum Pipeline Depth Considering Both Power and Performance

Author keywords

Design; Performance; Pipeline Depth; Power and Performance; Simulation; Theory; Workload Specificity

Indexed keywords


EID: 34247384969     PISSN: 15443566     EISSN: 15443973     Source Type: Journal    
DOI: 10.1145/1044823.1044824     Document Type: Article
Times cited : (11)

References (13)
  • 4
    • 0023386285 scopus 로고
    • Characterization of branch and data dependencies in programs for evaluating pipeline performance
    • Emma, P. G. and Davidson, E. S. 1987. Characterization of branch and data dependencies in programs for evaluating pipeline performance. IEEE Trans. Computers C-36 (1987), 859-875.
    • (1987) IEEE Trans. Computers , vol.C-36 , pp. 859-875
    • Emma, P.G.1    Davidson, E.S.2
  • 5
    • 0032592098 scopus 로고    scopus 로고
    • Deep-submicron microprocessor design issues
    • Flynn, M. J., Hung, P., and Rudd, K. 1999. Deep-submicron microprocessor design issues. IEEE Micro 19 (1999), 11-22.
    • (1999) IEEE Micro , vol.19 , pp. 11-22
    • Flynn, M.J.1    Hung, P.2    Rudd, K.3
  • 6
    • 0030243819 scopus 로고    scopus 로고
    • Energy dissipation in general purpose processors
    • González, R. and Horowitz, M. 1996. Energy dissipation in general purpose processors. IEEE J. Solid-State Circuits 31 (1996), 1277-1284.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 1277-1284
    • González, R.1    Horowitz, M.2
  • 11
    • 0036296819 scopus 로고    scopus 로고
    • Increasing processor performance by implementing deeper pipelines
    • (Anchorage, Alaska, May 2002). IEEE Computer Society, Washington, DC
    • Sprangle, E. and Carmean, D. 2002. Increasing processor performance by implementing deeper pipelines. In Proceedings of the 29th Annual International Symposium on Computer Architectures (Anchorage, Alaska, May 2002). IEEE Computer Society, Washington, DC, 25-35.
    • (2002) Proceedings of the 29th Annual International Symposium on Computer Architectures , pp. 25-35
    • Sprangle, E.1    Carmean, D.2
  • 13
    • 0036953966 scopus 로고    scopus 로고
    • Unified methodology for resolving power-performance tradeoffs of the microarchitectural and circuit levels
    • (Monterey, CA, Aug. 2002). ACM Press, New York
    • Zyuban, V. and Strenski, P. 2002. Unified methodology for resolving power-performance tradeoffs of the microarchitectural and circuit levels. In Proceedings of the International Symposium on Low-Power Electronics and Design (Monterey, CA, Aug. 2002). ACM Press, New York, 166-171.
    • (2002) Proceedings of the International Symposium on Low-Power Electronics and Design , pp. 166-171
    • Zyuban, V.1    Strenski, P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.