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Volumn 51, Issue 4 SPEC. ISS., 2007, Pages 518-525

A perspective on today's scaling challenges and possible future directions

Author keywords

CMOS; Limits; Power; Scaling; Variability

Indexed keywords

CMOS INTEGRATED CIRCUITS; CONSTRAINT THEORY; ELECTRIC INSULATORS; SYSTEMS ANALYSIS;

EID: 34047254077     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2007.02.004     Document Type: Article
Times cited : (49)

References (12)
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    • (1984) IEEE Trans Electron Devices , vol.31 , Issue.4 , pp. 452-462
    • Baccarani, G.1    Wordeman, M.R.2    Dennard, R.H.3
  • 3
    • 0029292445 scopus 로고
    • CMOS scaling for high performance and low power - the next ten years
    • Davari B., Dennard R.H., and Shahidi G.G. CMOS scaling for high performance and low power - the next ten years. Proc IEEE 83 4 (1995) 595-606
    • (1995) Proc IEEE , vol.83 , Issue.4 , pp. 595-606
    • Davari, B.1    Dennard, R.H.2    Shahidi, G.G.3
  • 4
    • 0036923408 scopus 로고    scopus 로고
    • Power constrained device and technology design for the end of scaling
    • Frank D.J. Power constrained device and technology design for the end of scaling. IEDM Tech Dig (2002) 643-646
    • (2002) IEDM Tech Dig , pp. 643-646
    • Frank, D.J.1
  • 6
    • 0015330654 scopus 로고
    • Ion-implanted complementary MOS transistors in low-voltage circuits
    • Swanson R.M., and Meindl J.D. Ion-implanted complementary MOS transistors in low-voltage circuits. IEEE J Solid-State Circ SC-7 4 (1972) 146-153
    • (1972) IEEE J Solid-State Circ , vol.SC-7 , Issue.4 , pp. 146-153
    • Swanson, R.M.1    Meindl, J.D.2
  • 8
    • 0019563707 scopus 로고
    • High performance heat sink for VLSI
    • Tuckerman D.B., and Pease R.F.W. High performance heat sink for VLSI. IEEE Electron Dev Lett EDL-2 5 (1981) 126-129
    • (1981) IEEE Electron Dev Lett , vol.EDL-2 , Issue.5 , pp. 126-129
    • Tuckerman, D.B.1    Pease, R.F.W.2
  • 11
    • 2942571688 scopus 로고    scopus 로고
    • Analysis of quantum ballistic transport in ultra-small silicon devices including space-charge and geometric effects
    • Laux S.E., Kumar A., and Fischetti M.V. Analysis of quantum ballistic transport in ultra-small silicon devices including space-charge and geometric effects. J Appl Phys 95 5 (2004) 5545-5582
    • (2004) J Appl Phys , vol.95 , Issue.5 , pp. 5545-5582
    • Laux, S.E.1    Kumar, A.2    Fischetti, M.V.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.