Supply voltage strategies for minimizing the power of CMOS processors

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2002, Pages 102-103

  Cai, Jin ^a   Taur, Yuan ^a   Huang, Shih Fen ^a   Frank, David J ^a   Kosonocky, Stephen ^a   Dennard, Robert H ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC POWER DISTRIBUTION; MOSFET DEVICES; OPTIMIZATION; THRESHOLD VOLTAGE;

POWER MINIMIZATION;

CMOS INTEGRATED CIRCUITS;

EID: 0036045609     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)