Modeling multiple input switching of CMOS gates in DSM technology using HDMR

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Sridharan, Jayashree ^a   Chen, Tom ^a  

^a Department of Mechanical Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; GATES (TRANSISTOR); LOGIC GATES; MATHEMATICAL MODELS; SWITCHING SYSTEMS;

CLOCK RATE; DELAY CHARACTERIZATION; HIGH DIMENSIONAL MODEL REPRESENTATION (HDMR); RELATIVE SIGNAL ARRIVAL TIMES (RSAT);

CMOS INTEGRATED CIRCUITS;

EID: 34047130292     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.244008     Document Type: Conference Paper

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