New statistical approach to timing analysis of VLSI circuits

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1998, Pages 507-513

  Lin, Rung Bin ^a   Wu, Meng Chiou ^a  

^a YUAN ZE UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CORRELATION METHODS; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT TESTING; PROBABILITY;

STATISTICAL TIMING ANALYSIS;

VLSI CIRCUITS;

EID: 0031703206     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)