Ultra-efficient (embedded) SOC architectures based on probabilistic CMOS (PCMOS) technology

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Chakrapani, Lakshmi N ^a   Akgul, Bilge E S ^a   Cheemalavagu, Suresh ^a   Korkmaz, Pinar ^a   Palem, Krishna V ^a   Seshasayee, Balasubramanian ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTATION THEORY; ENERGY EFFICIENCY; MICROPROCESSOR CHIPS; PROBABILISTIC LOGICS;

APPLICATION ARCHITECTURE TECHNOLOGY; HIGH PERFORMANCE COMPUTATION; PROBABILISTIC APPLICATIONS; PROBABILISTIC SYSTEM ON A CHIP (PSOC) ARCHITECTURES;

COMPUTER ARCHITECTURE;

EID: 34047100388     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.243978     Document Type: Conference Paper

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