-
1
-
-
0034224349
-
On the go with SONOS
-
Jan
-
M. H. White, "On the go with SONOS," IEEE Circuits Devices Mag., vol. 16, no. 1, p. 22, Jan. 2000.
-
(2000)
IEEE Circuits Devices Mag
, vol.16
, Issue.1
, pp. 22
-
-
White, M.H.1
-
2
-
-
0034250576
-
High performance SONOS memory cells free of drain turn-on and over-erase: Compatibility issue with current Flash technology
-
May
-
M. K. Cho and D. M. Kim, "High performance SONOS memory cells free of drain turn-on and over-erase: Compatibility issue with current Flash technology," IEEE Electron Device Lett., vol. 21, no. 5, pp. 399-401, May 2000.
-
(2000)
IEEE Electron Device Lett
, vol.21
, Issue.5
, pp. 399-401
-
-
Cho, M.K.1
Kim, D.M.2
-
3
-
-
0034315780
-
NROM: A novel localized trapping, 2-bit nonvolatile memory cell
-
Jul
-
B. Eitan, P. Pavan, I. Bloom, E. Aloni, A. Frommer, and D. Finzi, "NROM: A novel localized trapping, 2-bit nonvolatile memory cell," IEEE Electron Device Lett., vol. 21, no. 7, pp. 543-545, Jul. 2000.
-
(2000)
IEEE Electron Device Lett
, vol.21
, Issue.7
, pp. 543-545
-
-
Eitan, B.1
Pavan, P.2
Bloom, I.3
Aloni, E.4
Frommer, A.5
Finzi, D.6
-
4
-
-
0035714879
-
Data retention behavior of a SONOS type two-bit storage Flash memory cell
-
W. J. Tsai, N. K. Zous, C. J. Liu, C. C. Liu, C. H. Chen, T. Wang, S. Pan, and C.-Y. Lu, "Data retention behavior of a SONOS type two-bit storage Flash memory cell," in IEDM Tech. Dig., 2001, pp. 719-722.
-
(2001)
IEDM Tech. Dig
, pp. 719-722
-
-
Tsai, W.J.1
Zous, N.K.2
Liu, C.J.3
Liu, C.C.4
Chen, C.H.5
Wang, T.6
Pan, S.7
Lu, C.-Y.8
-
5
-
-
1342308176
-
Modeling for the second-bit effect of a nitride-based trapping storage Flash EEPROM cell under two-bit operation
-
Jan
-
Y. W. Chang, T. C. Lu, S. Pan, and C.-Y. Lu, "Modeling for the second-bit effect of a nitride-based trapping storage Flash EEPROM cell under two-bit operation," IEEE Electron Device Lett., vol. 25, no. 1, p. 95, Jan. 2004.
-
(2004)
IEEE Electron Device Lett
, vol.25
, Issue.1
, pp. 95
-
-
Chang, Y.W.1
Lu, T.C.2
Pan, S.3
Lu, C.-Y.4
-
6
-
-
3042658180
-
Cause of erase speed degradation during two-bit per cell operation of a trapping nitride storage Flash memory cell
-
W. J. Tsai, N. K. Zous, M. H. Chou, S. Huang, H. Y. Chen, Y. H. Yeh, M. Y. Liu, C. C. Yeh, T. Wang, J. Ku, and C.-Y. Lu, "Cause of erase speed degradation during two-bit per cell operation of a trapping nitride storage Flash memory cell," in Proc. Int. Reliability Phys. Symp., 2004, pp. 522-526.
-
(2004)
Proc. Int. Reliability Phys. Symp
, pp. 522-526
-
-
Tsai, W.J.1
Zous, N.K.2
Chou, M.H.3
Huang, S.4
Chen, H.Y.5
Yeh, Y.H.6
Liu, M.Y.7
Yeh, C.C.8
Wang, T.9
Ku, J.10
Lu, C.-Y.11
-
7
-
-
0036867142
-
Impact of programming charge distribution on threshold voltage and subthreshold slope of NROM memory cells
-
Nov
-
L. Larcher, G. Verzellesi, P. Pavan, E. Lusky, I. Bloom, and B. Eitan, "Impact of programming charge distribution on threshold voltage and subthreshold slope of NROM memory cells," IEEE Trans. Electron Devices, no. 11, pp. 1939-1946, Nov. 2002.
-
(2002)
IEEE Trans. Electron Devices
, Issue.11
, pp. 1939-1946
-
-
Larcher, L.1
Verzellesi, G.2
Pavan, P.3
Lusky, E.4
Bloom, I.5
Eitan, B.6
-
8
-
-
3042563205
-
Investigation of programmed charge lateral spread in a two-bit nitride storage Flash memory cell by using a charge pumping technique
-
S. H. Gu, M. T. Wang, C. T. Chan, N. K. Zous, C. C. Yeh, W. J. Tsai, T. C. Lu, T. Wang, J. Ku, and C.-Y. Lu, "Investigation of programmed charge lateral spread in a two-bit nitride storage Flash memory cell by using a charge pumping technique," in Proc. Int. Reliability Phys. Symp., 2004, pp. 639-640.
-
(2004)
Proc. Int. Reliability Phys. Symp
, pp. 639-640
-
-
Gu, S.H.1
Wang, M.T.2
Chan, C.T.3
Zous, N.K.4
Yeh, C.C.5
Tsai, W.J.6
Lu, T.C.7
Wang, T.8
Ku, J.9
Lu, C.-Y.10
-
9
-
-
0032000289
-
Direct lateral profiling of hot-carrier-induced oxide charge and interface traps in thin gate MOSFET's
-
Apr
-
C. Chen and T. P. Ma, "Direct lateral profiling of hot-carrier-induced oxide charge and interface traps in thin gate MOSFET's," IEEE Trans. Electron Devices, vol. 45, no. 4, pp. 512-520, Apr. 1998.
-
(1998)
IEEE Trans. Electron Devices
, vol.45
, Issue.4
, pp. 512-520
-
-
Chen, C.1
Ma, T.P.2
-
10
-
-
0026880705
-
Oxide charge buildup and spread-out during channel-hot-carrier injection in N-MOSFET's
-
Apr
-
W. Chen and T. P. Ma, "Oxide charge buildup and spread-out during channel-hot-carrier injection in N-MOSFET's," IEEE Electron Device Lett., vol. 13, no. 4, pp. 319-321, Apr. 1992.
-
(1992)
IEEE Electron Device Lett
, vol.13
, Issue.4
, pp. 319-321
-
-
Chen, W.1
Ma, T.P.2
-
11
-
-
0024125256
-
Lateral distribution of hot-carrier-induced interface traps in MOSFET's
-
Nov
-
M. G. Ancona, N. S. Saks, and D. McCarthy, "Lateral distribution of hot-carrier-induced interface traps in MOSFET's," IEEE Trans. Electron Devices, vol. ED-35, no. 11, pp. 2221-2228, Nov. 1988.
-
(1988)
IEEE Trans. Electron Devices
, vol.ED-35
, Issue.11
, pp. 2221-2228
-
-
Ancona, M.G.1
Saks, N.S.2
McCarthy, D.3
-
12
-
-
2442596119
-
An endurance evaluation method for Flash EEPROM
-
Jun
-
N. K. Zous, Y. J. Chen, C. Y. Chin, W. J. Tsai, T. C. Lu, M. S. Chen, W. P. Lu, T. Wang, S. Pan, and C. Y. Lu, "An endurance evaluation method for Flash EEPROM," IEEE Trans. Electron Devices, vol. 51, no. 6, pp. 720-725, Jun. 2004.
-
(2004)
IEEE Trans. Electron Devices
, vol.51
, Issue.6
, pp. 720-725
-
-
Zous, N.K.1
Chen, Y.J.2
Chin, C.Y.3
Tsai, W.J.4
Lu, T.C.5
Chen, M.S.6
Lu, W.P.7
Wang, T.8
Pan, S.9
Lu, C.Y.10
-
13
-
-
0032682912
-
Trap-assisted tunneling current through ultrathin oxide
-
J. Wu, L. F. Register, and E. Rosenbaum, "Trap-assisted tunneling current through ultrathin oxide," in Proc. Int. Reliability Phys. Symp., 1999, pp. 389-395.
-
(1999)
Proc. Int. Reliability Phys. Symp
, pp. 389-395
-
-
Wu, J.1
Register, L.F.2
Rosenbaum, E.3
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