The role of simulation in failure prediction and design optimization in electronics packaging

7th International Conference on Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, EuroSimE 2006

Volumn 2006, Issue , 2006, Pages

  Tay, Andrew A O ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; FAILURE ANALYSIS; INTEGRATED CIRCUITS; OPTIMIZATION; PRODUCT DESIGN;

FAILURE PREDICTION; INTERCONNECT COMPLIANCE; INTERCONNECT DESIGN; INTERCONNECTED WAFER LEVEL PACKAGES;

ELECTRONICS PACKAGING;

EID: 33847112522     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESIME.2006.1644060     Document Type: Conference Paper

References (5)

1. A. A. O. Tay, Modeling of Interfacial Delamination in Plastic IC Packages Under Hygrothermal Loading. ASME Journal of Electronic Packaging, vol. 127 (3): 268-275 Sept 2005.
2. th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, 2004. ITHERM 2004, 1-4 June 2004, pp 245-252.
3. Tay, A. A. O., Ma, Y. Y., Ong, S. H., and Nakamura, T., 1999, "Measurement of Interfacial Toughness as a Function of Temperature, Moisture Concentration and Mode Mixity", ASME Advances in Electronics Packing, EEP-Vol. 26-2, pp. 1129-1136.
4. th Electronics Packaging Technology Conference, Singapore, December 2004, pp 516-521.
5. Y. T. Lin, C. T. Peng and K. N. Chiang, Parametric design and reliability analysis of wire interconnect technology wafer level packaging, Transactions of ASME, Journal of Electronic Packaging, vol. 124, pp 234-239, 2002.