Depth profiling of border traps in MOSFET with high-κ gate dielectric by charge-pumping technique

IEEE Electron Device Letters

Volumn 27, Issue 10, 2006, Pages 859-862

  Lu, Chun Yuan ^a   Chang Liao, Kuei Shu ^a   Tsai, Ping Hung ^a   Wang, Tien Ko ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

Border trap; Bulk trap; Charge pumped per cycle; Charge pumping (CP) technique; Depth profile; High dielectric; Interface trap density

Indexed keywords

BORDER TRAP; BULK TRAP; CHARGE PUMPED PER CYCLE; CHARGE-PUMPING (CP) TECHNIQUE; DEPTH PROFILE; INTERFACE-TRAP DENSITY;

GATE DIELECTRICS; GATES (TRANSISTOR); PUMPS;

DEPTH PROFILING;

EID: 33846943761     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2006.882563     Document Type: Article

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