A mapping algorithm for defect-tolerance of reconfigurable nano-architectures

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2005, Issue , 2005, Pages 668-672

  Tahoori, Mehdi B ^a  

^a NORTHEASTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONFORMAL MAPPING; LITHOGRAPHY; MICROPROCESSOR CHIPS; NANOTECHNOLOGY; VLSI CIRCUITS;

DEFECT TOLERANT DESIGN; MAPPING ALGORITHM; NANO ARCHITECTURES; RECONFIGURABLE DEVICES;

NANOSTRUCTURED MATERIALS;

EID: 33751411871     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560150     Document Type: Conference Paper

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