Fast thermal simulation for architecture level dynamic thermal management

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2005, Issue , 2005, Pages 639-644

  Liu, Pu ^a   Qi, Zhenyu ^a   Li, Hang ^a   Jin, Lingling ^a   Wu, Wei ^a   Tan, Sheldon X D ^a   Yang, Jun ^a  

^a University of California Riverside   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL METHODS; ELECTRIC POWER UTILIZATION; FREQUENCY DOMAIN ANALYSIS; MICROPROCESSOR CHIPS; SPECTRUM ANALYSIS;

CHIP ARCHITECTURE LEVEL; DYNAMIC THERMAL MANAGEMENT; INTEGRATION BASED TRANSIENT ANALYSIS; THERMAL SIMULATION;

COMPUTER AIDED DESIGN;

EID: 33751396905     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560145     Document Type: Conference Paper

References (17)

1. Http://www.spec.org/cpu2000/CFP2000/.
2. "International technology roadmap for semiconductors(itrs), 2004 update," 2001, http://public.itrs.net.
3. D. Brooks and M. Martonosi, "Dynamic thermal management for high-performance microprocessors," in Proc. of Intl. Symp. on High-Performance Comp. Architecture, 2001, pp. 171-182.
4. Y.-K. Cheng, C.-H. Tsai, C.-C. Teng, and S.-M. Kang, Electrothermal Analysis of VLSI Systems. Kluwer Academic Publishers, 2000.
5. W. Huang, M. Stan, K. Skadron, K. Sankaranarayanan, S. Ghosh, and S. Velusamy, "Compact thermal modeling for temperature-aware design," in Proc. Design Automation Conf. (DAC), 2004, pp. 878-883.
6. Y. Ismail, "Efficient model order reduction via multi-node moment matching," in Proc. Int. Conf. on Computer Aided Design (ICCAD), Nov. 2002, pp. 767-774.
7. S. Lee, S. Song, V. Au, and K. Moran, "Constricting/spreading resistance model for electronics packaging," in Proc. ASME/JSME Thermal Engineering Conference, Mar. 1995, pp. 199-206.
8. L. T. Pillage and R. A. Rohrer, "Asymptotic waveform evaluation for timing analysis," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, pp. 352-366, April 1990.
9. T. Sherwood, E. Perelman, and B. Calder, "Basic block distribution analysis to find periodic behavior and simulation points in applications," in the International Conference on Parallel Architectures and Compilation Techniques(PACT2001), 2001, pp. 3-14.
10. T. Sherwood, E. Perelman, G. Hamerly, S. Sair, and B. Calder, "Discovering and exploiting program phases," in IEEE Micro:Micro's Top Picks from Computer Architecture Conferences, 2003, pp. 84-93.
11. T. Sherwood, S. Sair, and B. Calder, "Phase tracking and prediction," in Proc. IEEE International Symposium on Computer Architecture (ISCA), 2003, pp. 45-57.
12. K. Skadron, M. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan, "Temperature aware microarchitecture," in Proc. IEEE International Symposium on Computer Architecture (ISCA), 2003, pp. 2-13.
13. _, "Temperature aware microarchitecture: Extended discussion and results," in University of Virginia, Dept. of Computer Science, Technicial Report CS-2003-08, Apr. 2003.
14. B. Wang and P. Mazumder, "Fast thermal analysis for vlsi circuits via semi-analytical green's function in multi-layer materials," in Proc. IEEE Int. Symp. on Circuits and Systems (ISCAS), 2004.
15. T. Y. Wang and C. C. Chen, "3-D thermal-ADI: a linear-time chip level transient thermal simulator," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 21, no. 12, pp. 1434-1445, Dec. 2002.
16. _, "Spice-compatible thermal simulation with lumped circuit modeling for thermal reliability analysis based on model reduction," in Proc. Int. Symposium, on Quality Electronic Design (ISQED), 2004, pp. 357-362.
17. Y. Zhan and S. Sapatnekar, "Fast computation of the temperature distribution in vlsi chips using the discrete cosine transform and table look-up," in Proc. Asia South Pacific Design Automation Conf. (ASPDAC), Jan. 2005, pp. 87-92.