Phase effects and short gate length device implementation of Ni fully silicided (FUSI) gates

Microelectronic Engineering

Volumn 83, Issue 11-12, 2006, Pages 2117-2121

  Kittl, J A ^a   Pawlak, M A ^a   Lauwers, A ^a   Demeurisse, C ^a   Hoffmann, T ^a   Veloso, A ^a   Anil, K G ^a   Kubicek, S ^a   Niwa, M ^a   van Dal, M J H ^b   Richard, O ^a   Jurczak, M ^a   Vrancken, C ^a   Chiarella, T ^a   Brus, S ^a   Maex, K ^a   Biesemans, S ^a  

^a IMEC   (Belgium)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

CMOS; FUSI gates; Ni rich silicides; NiSi

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; NICKEL; OPTIMIZATION; POLYSILICON; PROBLEM SOLVING;

FUSI GATES; NI-RICH SILICIDES; NISI;

LOGIC GATES;

EID: 33751234541     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2006.09.016     Document Type: Article

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