-
3
-
-
0035704561
-
Influence of compiler optimizations on system power
-
Dec.
-
M. Kandemir, N. Vijaykrishnan, M. J. Irwin, and W. Ye, "Influence of compiler optimizations on system power," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 9, no. 6, pp. 801-804, Dec. 2001.
-
(2001)
IEEE Trans. Very Large Scale Integr. (VLSI) Syst.
, vol.9
, Issue.6
, pp. 801-804
-
-
Kandemir, M.1
Vijaykrishnan, N.2
Irwin, M.J.3
Ye, W.4
-
5
-
-
0023995653
-
CATHEDRAL-II - A computer-aided synthesis system for digital signal processing VLSI systems
-
Apr.
-
H. De Man, J. Rabaey, J. Vanhoof, G. Goossens, P. Six, and L. Claesen, "CATHEDRAL-II - A computer-aided synthesis system for digital signal processing VLSI systems," Comput.-Aided Eng. J., vol. 5, no. 2, pp. 55-66, Apr. 1988.
-
(1988)
Comput.-aided Eng. J.
, vol.5
, Issue.2
, pp. 55-66
-
-
De Man, H.1
Rabaey, J.2
Vanhoof, J.3
Goossens, G.4
Six, P.5
Claesen, L.6
-
6
-
-
0034854261
-
Using symbolic algebra in algorithmic level DSP synthesis
-
A. Peymandoust and D. Micheli, "Using symbolic algebra in algorithmic level DSP synthesis," in Proc. Design Automation Conf., 2001, pp. 277-282.
-
(2001)
Proc. Design Automation Conf.
, pp. 277-282
-
-
Peymandoust, A.1
Micheli, D.2
-
7
-
-
0003340059
-
The art of computer programming
-
Reading, MA: Addison-Wesley
-
D. E. Knuth, 'The art of computer programming," in Seminumerical Algorithms, 2nd ed, vol. 2. Reading, MA: Addison-Wesley, 1981.
-
(1981)
Seminumerical Algorithms, 2nd Ed
, vol.2
-
-
Knuth, D.E.1
-
9
-
-
17444413610
-
Polynomial evaluation on multimedia processors
-
J. Villalba, G. Bandera, M. A. Gonzalez, J. Hormigo, and E. L. Zapata, "Polynomial evaluation on multimedia processors," in Proc. IEEE Int. Conf. Application-Specific Systems, Architectures Processors, 2002, pp. 265-274.
-
(2002)
Proc. IEEE Int. Conf. Application-specific Systems, Architectures Processors
, pp. 265-274
-
-
Villalba, J.1
Bandera, G.2
Gonzalez, M.A.3
Hormigo, J.4
Zapata, E.L.5
-
11
-
-
0041592439
-
Low power embedded software optimization using symbolic algebra
-
Aug.
-
A. Peymandoust, T. Simunic, and G. D. Micheli, "Low power embedded software optimization using symbolic algebra," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 22, no. 8, pp. 964-975, Aug. 2003.
-
(2003)
IEEE Trans. Comput.-aided Des. Integr. Circuits Syst.
, vol.22
, Issue.8
, pp. 964-975
-
-
Peymandoust, A.1
Simunic, T.2
Micheli, G.D.3
-
12
-
-
0026187058
-
Adaptive polynomial filters
-
Jul.
-
V. J. Mathews, "Adaptive polynomial filters," IEEE Signal Process. Mag., vol. 8, no. 3, pp. 10-26, Jul. 1991.
-
(1991)
IEEE Signal Process. Mag.
, vol.8
, Issue.3
, pp. 10-26
-
-
Mathews, V.J.1
-
13
-
-
33747834679
-
MIS: Multiple level logic optimization system
-
Nov.
-
A. S. Vincentelli, A. Wang, R. K. Brayton, and R. Rudell, "MIS: Multiple level logic optimization system," IEEE Trans. Cotnput.-Aided Des. Integr. Circuits Syst., vol. 6, no. 6, pp. 1062-1081, Nov. 1987.
-
(1987)
IEEE Trans. Cotnput.-aided Des. Integr. Circuits Syst.
, vol.6
, Issue.6
, pp. 1062-1081
-
-
Vincentelli, A.S.1
Wang, A.2
Brayton, R.K.3
Rudell, R.4
-
14
-
-
0002846615
-
The decomposition and factorization of boolean expressions
-
May
-
R. K. Brayton and C. T. McMullen, "The decomposition and factorization of boolean expressions," in Proc. Int. Symp. Circuits Systems, May 1982, pp. 49-54.
-
(1982)
Proc. Int. Symp. Circuits Systems
, pp. 49-54
-
-
Brayton, R.K.1
McMullen, C.T.2
-
15
-
-
0023531730
-
Multi-level logic optimization and the rectangular covering problem
-
Nov.
-
R. K. Brayton, R. Rudell, A. S. Vincentelli, and A. Wang, "Multi-level logic optimization and the rectangular covering problem," in Proc. Int. Conf. Comput.-Aided Des., Nov. 1987, pp. 66-69.
-
(1987)
Proc. Int. Conf. Comput.-aided Des.
, pp. 66-69
-
-
Brayton, R.K.1
Rudell, R.2
Vincentelli, A.S.3
Wang, A.4
-
16
-
-
0026883868
-
The testability-preserving concurrent decomposition and factorization of boolean expressions
-
Jun.
-
J. Rajski and J. Vasudevamurthy, 'The testability-preserving concurrent decomposition and factorization of boolean expressions," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 11, no. 6, pp. 778-793, Jun. 1992.
-
(1992)
IEEE Trans. Comput.-aided Des. Integr. Circuits Syst.
, vol.11
, Issue.6
, pp. 778-793
-
-
Rajski, J.1
Vasudevamurthy, J.2
-
17
-
-
0016973779
-
Optimal code generation for expression frees
-
Jul.
-
A. V. Aho and S. C. Johnson, "Optimal code generation for expression frees," J. ACM, vol. 23, no. 3, pp. 488-501, Jul. 1976.
-
(1976)
J. ACM
, vol.23
, Issue.3
, pp. 488-501
-
-
Aho, A.V.1
Johnson, S.C.2
-
18
-
-
84976692936
-
Code generation for expressions with common subexpressions
-
Jan.
-
A. V. Aho, S. C. Johnson, and J. D. Ullman, "Code generation for expressions with common subexpressions," ACM, vol. 24, no. 1, pp. 146-160, Jan. 1977.
-
(1977)
ACM
, vol.24
, Issue.1
, pp. 146-160
-
-
Aho, A.V.1
Johnson, S.C.2
Ullman, J.D.3
-
19
-
-
0014855855
-
The generation of optimal code for arithmetic expressions
-
Oct.
-
R. Sethi and J. D. Ullman, "The generation of optimal code for arithmetic expressions," Commun. ACM, vol. 17, no. 4, pp. 715-728, Oct. 1970.
-
(1970)
Commun. ACM
, vol.17
, Issue.4
, pp. 715-728
-
-
Sethi, R.1
Ullman, J.D.2
-
20
-
-
16244409454
-
Generation of optimal code for expressions via factorization
-
Jun.
-
M. A. Breuer, "Generation of optimal code for expressions via factorization," Commun. ACM, vol. 12, no. 6, pp. 333-340, Jun. 1969.
-
(1969)
Commun. ACM
, vol.12
, Issue.6
, pp. 333-340
-
-
Breuer, M.A.1
-
21
-
-
33748304045
-
-
[Online]
-
GNU C Library, [Online]. Available: http://www.gnu.org/software/libc
-
GNU C Library
-
-
-
23
-
-
0031342514
-
Energy minimization using multiple supply voltages
-
Dec.
-
J.-M. Chang and M. Pedram, "Energy minimization using multiple supply voltages," IEEE Trans. Very Large Scale Integr. Syst., vol. 5, no. 4, pp. 436-443, Dec. 1997.
-
(1997)
IEEE Trans. Very Large Scale Integr. Syst.
, vol.5
, Issue.4
, pp. 436-443
-
-
Chang, J.-M.1
Pedram, M.2
-
24
-
-
0032202596
-
High-level power modeling, estimation, and optimization
-
Nov.
-
E. Macii, M. Pedram, and F. Somenzi, "High-level power modeling, estimation, and optimization," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 17, no. 11, pp. 1061-1079, Nov. 1998.
-
(1998)
IEEE Trans. Comput.-aided Des. Integr. Circuits Syst.
, vol.17
, Issue.11
, pp. 1061-1079
-
-
Macii, E.1
Pedram, M.2
Somenzi, F.3
-
25
-
-
0029231165
-
Optimizing power using transformations
-
Jan.
-
A. P. Chandrakasan, M. Potkonjak, R. Mehra, J. Rabaey, and R. W. Brodersen, "Optimizing power using transformations," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 14, no. 1, pp. 12-31, Jan. 1995.
-
(1995)
IEEE Trans. Comput.-aided Des. Integr. Circuits Syst.
, vol.14
, Issue.1
, pp. 12-31
-
-
Chandrakasan, A.P.1
Potkonjak, M.2
Mehra, R.3
Rabaey, J.4
Brodersen, R.W.5
-
26
-
-
0032295394
-
High-level address optimization and synthesis techniques for data-transferintensive applications
-
Dec.
-
M. A. Miranda, F. V. M. Catthoor, M. Janssen, and H. J. De Man, "High-level address optimization and synthesis techniques for data-transferintensive applications," IEEE Trans. Very Large Scale Integr. Syst., vol. 6, no. 4, pp. 677-686, Dec. 1998.
-
(1998)
IEEE Trans. Very Large Scale Integr. Syst.
, vol.6
, Issue.4
, pp. 677-686
-
-
Miranda, M.A.1
Catthoor, F.V.M.2
Janssen, M.3
De Man, H.J.4
-
27
-
-
16244375083
-
-
[Online]
-
ARM7TDMI Tech Reference Manual. (2003). [Online]. Available: http://www.arm.com/documentation/ARMProcessor_Cores/index.html
-
(2003)
ARM7TDMI Tech Reference Manual
-
-
-
28
-
-
0032285012
-
An energy efficient scheduling scheme for signal processing applications
-
V. Krishna, N. Ranganathan, and N. Vijayakrishnan, "An energy efficient scheduling scheme for signal processing applications," in Proc. Asilomar Conf. Signals, Syst., Comput., 1998, vol. 2, pp. 1057-1061.
-
(1998)
Proc. Asilomar Conf. Signals, Syst., Comput.
, vol.2
, pp. 1057-1061
-
-
Krishna, V.1
Ranganathan, N.2
Vijayakrishnan, N.3
-
30
-
-
0034841273
-
Jouletrack-a Web based tool for software energy profiling
-
A. Sinha and A. P. Chandrakasan, "Jouletrack-A web based tool for software energy profiling," in Proc. Design Automation Conf., 2001, pp. 220-225.
-
(2001)
Proc. Design Automation Conf.
, pp. 220-225
-
-
Sinha, A.1
Chandrakasan, A.P.2
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