Polynomial evaluation on multimedia processors

Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors

Volumn 2002-January, Issue , 2002, Pages 265-274

  Villalba, J ^a   Bandera, G ^a   Gonzalez, M A ^a   Hormigo, J ^a   Zapata, E L ^a  

^a UNIVERSITY OF MÁLAGA   (Spain)

Author keywords

Polynomials

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; DIGITAL SIGNAL PROCESSING; PARALLEL PROCESSING SYSTEMS; POLYNOMIALS;

INSTRUCTION-LEVEL; MULTIMEDIA APPLICATIONS; MULTIMEDIA PROCESSORS; POLYNOMIAL EVALUATION; PROCESSOR ARCHITECTURES; SINGLE INSTRUCTION MULTIPLE DATA ARCHITECTURES; SUB-WORD PARALLELISM; VLIW(VERY LONG INSTRUCTION WORD);

VERY LONG INSTRUCTION WORD ARCHITECTURE;

EID: 17444413610     PISSN: 10636862     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASAP.2002.1030725     Document Type: Conference Paper

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