-
1
-
-
0031099652
-
Embedded software in real-time signal processing systems: Application and architecture trends
-
Mar.
-
P. G. Paulin, C. Liem, M. Cornero, F. Nacabal, and G. Goossens, "Embedded software in real-time signal processing systems: Application and architecture trends," Proc. IEEE, vol. 85, pp. 419-435, Mar. 1997.
-
(1997)
Proc. IEEE
, vol.85
, pp. 419-435
-
-
Paulin, P.G.1
Liem, C.2
Cornero, M.3
Nacabal, F.4
Goossens, G.5
-
2
-
-
0003317447
-
SmartBadges: A wearable computer and communication system
-
G. Q. Maguire, M. Smith, and H. W. P. Beadle, "SmartBadges: A wearable computer and communication system," in Proc. 6th Int. Workshop on Hardware/Software Codesign, 1998, pp. 10-16.
-
(1998)
Proc. 6th Int. Workshop on Hardware/Software Codesign
, pp. 10-16
-
-
Maguire, G.Q.1
Smith, M.2
Beadle, H.W.P.3
-
4
-
-
0030677469
-
Fridge: An interactive fixed-point code generation environment for HW/SW codesign
-
M. Willems, H. Keding, T. Grötket, and H. Meyr, "Fridge: An interactive fixed-point code generation environment for HW/SW codesign," in Proc. Int. Conf. Acoustics, Speech, Sig. Process., 1997, pp. 687-690.
-
(1997)
Proc. Int. Conf. Acoustics, Speech, Sig. Process.
, pp. 687-690
-
-
Willems, M.1
Keding, H.2
Grötket, T.3
Meyr, H.4
-
6
-
-
0034846651
-
Hardware/software instruction set configurability for system-on-Chip processors
-
A. Wang, E. Killian, D. Maydan, and C. Rowen, "Hardware/software instruction set configurability for system-on-Chip processors," in Proc. Design Automation Conf., 2001, pp. 184-190.
-
(2001)
Proc. Design Automation Conf.
, pp. 184-190
-
-
Wang, A.1
Killian, E.2
Maydan, D.3
Rowen, C.4
-
8
-
-
0030380793
-
Maximizing multiprocessor performance with the SUIF compiler
-
Dec.
-
M. Hall, J. Anderson, S. Amarasinghe, B. Murphy, S. Liao, E. Bugnion, and M. Lam, "Maximizing multiprocessor performance with the SUIF compiler," IEEE Comput., vol. 29, pp. 84-89, Dec. 1996.
-
(1996)
IEEE Comput.
, vol.29
, pp. 84-89
-
-
Hall, M.1
Anderson, J.2
Amarasinghe, S.3
Murphy, B.4
Liao, S.5
Bugnion, E.6
Lam, M.7
-
11
-
-
0003913538
-
-
Norwell, MA: Kluwer
-
F. Catthoor, S. Wuytack, E. De Greef, F. Balasa, L. Nachtergaele, and A. Vanduoppelle, Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design. Norwell, MA: Kluwer, 1998.
-
(1998)
Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design
-
-
Catthoor, F.1
Wuytack, S.2
De Greef, E.3
Balasa, F.4
Nachtergaele, L.5
Vanduoppelle, A.6
-
12
-
-
0030206510
-
Instruction level power analysis and optimization of software
-
V. Tiwari, S. Malik, A. Wolfe, and M. Lee, "Instruction level power analysis and optimization of software," J. VLSI Signal Process. Syst., vol. 13, no. 2-3, pp. 223-238, 1996.
-
(1996)
J. VLSI Signal Process. Syst.
, vol.13
, Issue.2-3
, pp. 223-238
-
-
Tiwari, V.1
Malik, S.2
Wolfe, A.3
Lee, M.4
-
13
-
-
0028722375
-
Power analysis of embedded software: A first step toward software power minimization
-
Dec.
-
V. Tiwari, S. Malik, and A. Wolfe, "Power analysis of embedded software: A first step toward software power minimization," IEEE Trans. VLSI Syst., vol. 2, pp. 437-445, Dec. 1994.
-
(1994)
IEEE Trans. VLSI Syst.
, vol.2
, pp. 437-445
-
-
Tiwari, V.1
Malik, S.2
Wolfe, A.3
-
15
-
-
0041392186
-
-
Texas Instruments
-
TI'54x DSP Library, Texas Instruments, 2000.
-
(2000)
TI'54x DSP Library
-
-
-
19
-
-
0030655898
-
Techniques for low energy software
-
H. Mehta, R. M. Owens, M. J. Irvin, R. Chen, and D. Ghosh, "Techniques for low energy software," in Proc. Int. Symp. Low-Power Electron. Design, 1997, pp. 72-75.
-
(1997)
Proc. Int. Symp. Low-Power Electron. Design
, pp. 72-75
-
-
Mehta, H.1
Owens, R.M.2
Irvin, M.J.3
Chen, R.4
Ghosh, D.5
-
20
-
-
0031634246
-
A framework for estimating and minimizing energy dissipation of embedded HW/SW systems
-
Y. Li and J. Henkel, "A framework for estimating and minimizing energy dissipation of embedded HW/SW systems," in Proc. Design Automation Conf. 1998, pp. 188-193.
-
(1998)
Proc. Design Automation Conf.
, pp. 188-193
-
-
Li, Y.1
Henkel, J.2
-
21
-
-
20444438621
-
Instruction scheduling for power reduction in processor-based system design
-
Feb.
-
H. Tomyiama, H. T. Ishihara, A. Inoue, and H. Yasuura, "Instruction scheduling for power reduction in processor-based system design," Design, Automation, Test Eur., pp. 23-26, Feb. 1998.
-
(1998)
Design, Automation, Test Eur.
, pp. 23-26
-
-
Tomyiama, H.1
Ishihara, H.T.2
Inoue, A.3
Yasuura, H.4
-
22
-
-
0003389168
-
Influence of compiler optimizations on system power
-
M. Kandemir, N. Vijaykrishnan, M. Irwin, and W. Ye, "Influence of compiler optimizations on system power," in Proc. 27th Int. Symp. Comput. Architecture, 2000, pp. 35-41.
-
(2000)
Proc. 27th Int. Symp. Comput. Architecture
, pp. 35-41
-
-
Kandemir, M.1
Vijaykrishnan, N.2
Irwin, M.3
Ye, W.4
-
24
-
-
0035242857
-
Energy-efficient design of battery-powered embedded systems
-
May
-
T. Simunic, L. Benini, and G. De Micheli, "Energy-efficient design of battery-powered embedded systems," IEEE Trans. VLSI Syst., vol. 9, pp. 18-28, May 2001.
-
(2001)
IEEE Trans. VLSI Syst.
, vol.9
, pp. 18-28
-
-
Simunic, T.1
Benini, L.2
De Micheli, G.3
-
26
-
-
0042895274
-
-
Waterloo Maple Inc. [Online]
-
(1988) Maple. Waterloo Maple Inc. [Online]. Available: www.maplesoft.com
-
(1988)
-
-
-
27
-
-
0004062749
-
-
[Online]. Available
-
(1987) Mathematica. Wolfram Research Inc. [Online]. Available: www.wri.com
-
(1987)
Mathematica
-
-
-
29
-
-
0034854261
-
Using symbolic algebra in algorithmic level DSP synthesis
-
_, "Using symbolic algebra in algorithmic level DSP synthesis," in Proc. Design Automation Conf, 2001, pp. 277-282.
-
(2001)
Proc. Design Automation Conf
, pp. 277-282
-
-
-
32
-
-
0035708531
-
Polynomial circuit models for component matching in high-level synthesis
-
Dec.
-
_, "Polynomial circuit models for component matching in high-level synthesis," IEEE Trans. VLSI Syst., vol. 9, pp. 783-800, Dec. 2001.
-
(2001)
IEEE Trans. VLSI Syst.
, vol.9
, pp. 783-800
-
-
-
33
-
-
0003268059
-
DSPstone: A DSP-oriented benchmarking methodology
-
Dallas, TX
-
V. Zivojnovic, J. Martinez, C. Schläger, and H. Meyr, "DSPstone: A DSP-oriented benchmarking methodology," in Proc. Int. Conf. Sig. Process. Applicat. Technol., Dallas, TX, 1994.
-
(1994)
Proc. Int. Conf. Sig. Process. Applicat. Technol.
-
-
Zivojnovic, V.1
Martinez, J.2
Schläger, C.3
Meyr, H.4
-
34
-
-
84949935382
-
Source code optimization and profiling of energy consumption in embedded systems
-
Sept.
-
T. Simunic, L. Benini, G. De Micheli, and M. Hans, "Source code optimization and profiling of energy consumption in embedded systems," in Proc. Int. Symp. Syst. Synthesis, Sept. 2000, pp. 193-198.
-
(2000)
Proc. Int. Symp. Syst. Synthesis
, pp. 193-198
-
-
Simunic, T.1
Benini, L.2
De Micheli, G.3
Hans, M.4
-
35
-
-
0041392188
-
Application of symbolic computer algebra in high-level data-flow synthesis
-
Sept. to be published
-
A. Peymandoust and G. De Micheli, "Application of symbolic computer algebra in high-level data-flow synthesis," IEEE Trans. Computer-Aided Design, vol. 22, Sept. 2003, to be published.
-
(2003)
IEEE Trans. Computer-Aided Design
, vol.22
-
-
Peymandoust, A.1
De Micheli, G.2
|