SRAM circuit-failure modeling and reliability simulation with SPICE

IEEE Transactions on Device and Materials Reliability

Volumn 6, Issue 2, 2006, Pages 235-246

  Li, Xiaojun ^b   Qin, Jin ^b   Huang, Bing ^b   Zhang, Xiaohu ^b   Bernstein, Joseph B ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF MARYLAND   (United States)

Author keywords

Circuit reliability analysis; Failure mechanisms; Reliability modeling; Simulation program with integrated circuit emphasis (SPICE) simulation; SRAM

Indexed keywords

CIRCUIT-RELIABILITY ANALYSIS; FAILURE MECHANISMS; RELIABILITY MODELING; SIMULATION PROGRAM WITH INTEGRATED CIRCUIT EMPHASIS (SPICE) SIMULATION;

COMPUTER SIMULATION; ELECTRIC NETWORK ANALYSIS; ELECTRONIC EQUIPMENT; FAILURE ANALYSIS; NETWORKS (CIRCUITS); SEMICONDUCTOR MATERIALS;

STATIC RANDOM ACCESS STORAGE;

EID: 33748109378     PISSN: 15304388     EISSN: 15304388     Source Type: Journal    
DOI: 10.1109/TDMR.2006.876568     Document Type: Conference Paper

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