A study of Cu/Low-k stress-induced voiding at via bottom and its microstructure effect

Microelectronics Reliability

Volumn 46, Issue 9-11, 2006, Pages 1673-1678

  Wang, Robin C J ^a,b   Lee, C C ^b   Chen, L D ^a   Wu, Kenneth ^a   Chang Liao, K S ^b  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^b NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COPPER COMPOUNDS; CRYSTAL DEFECTS; DIELECTRIC MATERIALS; SENSITIVITY ANALYSIS; STRESS ANALYSIS;

MICROSTRUCTURE EFFECT; STRESS-INDUCED VOIDING (SIV); THICKNESS VARIATION; VOIDING EVOLUTION;

MICROSTRUCTURE;

EID: 33748038771     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2006.07.053     Document Type: Article

References (7)

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