Failure analyses for debug and ramp-up of modern IC's

Microelectronics Reliability

Volumn 46, Issue 9-11, 2006, Pages 1486-1497

  Burmer, Christian ^a   Görlich, Siegfried ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER DEBUGGING; ELECTRIC FAULT LOCATION; FAILURE ANALYSIS; IDENTIFICATION (CONTROL SYSTEMS); MODEMS; STATIC RANDOM ACCESS STORAGE;

DEBUG TECHNIQUES; FAULT IDENTIFICATION; MODEM TECHNIQUE; SCAN SHIFT;

INTEGRATED CIRCUITS;

EID: 33747798644     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2006.07.024     Document Type: Article

References (23)

1. Egger P, Burmer C. SRAM Failure Analysis Strategy. Proc 29th ISTFA 2003:177ff.
2. Long TK, et al. Time Domain Reflectrometry Technique for Failure Analysis. Proc 30th ISTFA 2004:616-22.
3. Knauss L.A., et al. Scanning SQUID microscopy for current imaging. Microelectronics Reliability 41 8 (2001) 1211-1229
4. Nguyen D, To T, Harrison R, Phan C, Drummond J. Dallas Device Analysis Operation. Dallas, Texas: Texas Instruments, Inc.; Proc 30th ISTFA 2004:103-8.
5. Fleuren EM. Avery Sensitive, Simple Analysis Technique using Nematic Liquid Crystals. Proc IEEE IRPS 1983.
6. Boit C, Kölzer J, Benzinger H, Dallmann A, Herzog M, Quincke J. Discrimination of Parasitic Bipolar Operating modes in IC's with Emission Microscopy. Int rel Physics Symp 1990.
7. Cole Jr. E.I., Tangyunyong P., and Barton D.L. TIVA and SEI developments for enhanced front and backside interconnection failure analysis. ESREF (1999) 991-996
8. Cole Jr. EI. et al. Resistive Interconnect Localization. Proc 27th ISTFA 2001:43-50.
9. Nikawa K, Inoue S. Various Contrasts Identifiable from the Backside of a Chip by 1.3 μm Laser. Proc 22th ISTFA 1996:387-92.
10. Bruce MR, et al. Soft Defect Localization (SDL). Proc 28th ISTFA 2002:21-7.
11. Qian Zhongling, Brillert Christof, Burmer Christian, GrütznerK Markus. Lock-In Assisted Soft Defect Localization (LIA-SDL) and its Application In Scan Shift Problems. Proc 31st ISTFA 2005:387-92.
12. Schlangen R, Leihkauf R, Kerst U, Boit C, Krüger B. Functional IC Analysis through Chip Backside with Nano Scale resolution- E-beam probing in FIB trenches to STI Level. Proc 32nd ISTFA 2006 tbp.
13. Burmer C, Egger P, Huber A, Cerva H, Petit D, Grellner F. Fault Localization of a Scan Shift Problem on Integrated Logic Designs. Proc 29th ISTFA 2003:384-90.
14. Cain B, Woods GL, Herlein R, Syed A. Toshihiro Nomura: Analog Circuit Failure Analysis Using Time- Resolved Emission. Proc 31st ISTFA 2005:363-9.
15. Vickers J, Pakdaman N, Kasapi S. Prospects of Time-Resolved Photon Emission as a Debug Tool. Proc 28th ISTFA 2002:645-65.
16. Stellari F, Song P, Weger AJ, McManus MK. Time-Resolved Optical Measurements from 0.13 μm CMOS Technology Microprocessor using a Superconducting Single-Photon Detector. Proc 29th ISTFA 2003:40-4.
17. Wu, Lee, et al. Single Device Characterization by Nano Probing to Identify Failure Root Cause. Proc 31st ISTFA 2005:183-8.
18. Chen K, Chatterjee T, Christensen K, Rosal J, Edwards H. Atomic Force Probing in Analog MOSFETs Measurement. Proc 31th ISTFA 2005:311-5.
19. Schrag et al. Scanning Magnetoresistance Microscopy for Die Level Sub Micron Current Density Mapping. Proc 29th ISTFA 2003:2-5.
20. Thompson MA, Richardson C, LeRoy E, Lundqist T, Thompson WB. Coaxial Photon-Ion Technology enables Direct navigation of Buried Nodes on Planarized Surfaces, including Silicon. Proc 28th ISTFA 2002:409-13.
21. Zimmermann G., Born A., Ebersberger B., and Boit C. Application of SCM for microcharacterisation of semiconductor devices. Appl Phys A76 (2003) 885-888
22. Schweinböck T, Schömann S, Alavarez D, Buzzo M, Frammelsberger W, Breitschopf P, Benstetter B. New trends in the application of Scanning Probe Techniques in Failure Analysis. ESREF 2004.
23. Schömann S, Alavarez D. Doping mapping by SSRM-reaching maturity and sub-10nm resolution. New trends in the application of Scanning Probe Techniques in Failure Analysis. Proc 30th ISTFA 2004:346-9.